Asus DT2P User Manual - Page 72

Chipset

Page 72 highlights

L3 Cache [Enabled] L3 [Enabled] [Disabled] Max CPUID Value Limit [Disabled] [Disabled] [Enabled] CPUID Hyper-Threading Technology [Enabled] Threading Technology Hyper[Enabled] [Disabled] Technology Intel Pentium 4 Hyper-Threading 4.4.2 Chipset Advanced Chipset settings WARNING: Setting wrong values in the sections below may cause system to malfunction. DDR Reference Voltage DRAM Frequency Configure DRAM Timing by SPD Internal Graphic Acceleration Mode [Auto] [Auto] [Enabled] [Auto] Graphic Adapter Priority Onboard Video Memory Graphics Aperture Size Spread Spectrum [PCI/AGP] [Enabled, 8MB] [ 64MB] [Enabled] Boot Display Device Flat Panel type TV Standard [Auto] [640x480LVDS] [Auto] Set DDR reference voltage. MPS Revision [1.4] DDR Reference Voltage [Auto] DDR SDRAM 65V] 4-18 [Auto] [2.55V] [2.

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4-18
L3 Cache [Enabled]
L3
[Enabled] [Disabled]
Max CPUID Value Limit [Disabled]
CPUID
[Disabled] [Enabled]
Hyper-Threading Technology [Enabled]
H
y
p
e
r
-
Threading Technology
[Enabled] [Disabled]
Hyper-Threading
Technology
Intel Pentium 4
4.4.2
Chipset
Advanced Chipset settings
WARNING: Setting wrong values in the sections below
may cause system to malfunction.
DDR Reference Voltage
[Auto]
DRAM Frequency
[Auto]
Configure DRAM Timing by SPD
[Enabled]
Internal Graphic Acceleration Mode
[Auto]
Graphic Adapter Priority
[PCI/AGP]
Onboard Video Memory
[Enabled, 8MB]
Graphics Aperture Size
[ 64MB]
Spread Spectrum
[Enabled]
Boot Display Device
[Auto]
Flat Panel type
[640x480LVDS]
TV Standard
[Auto]
Set DDR reference
voltage.
MPS Revision
[1.4]
DDR Reference Voltage [Auto]
DDR SDRAM
[Auto] [2.55V] [2.
65V]