Asus P7F-M User Manual - Page 73
DRAM Margin Ranks [Disabled], MRC Serial Debug Message Level [Disabled], Memory ECC Function [
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Configure DRAM Timing by SPD [Enabled] Configuration options: [Enabled] [Disabled] The ofllowing 10 items appear when you set Configure DRAM Timing by SPD to [Disabled]. DRAM tCL [7] Configuration options: [3]-[15] DRAM tRAS [20] Configuration options: [9]-[63] DRAM tRP [7] Configuration options: [3]-[15] DRAM tRCD [7] Configuration options: [3]-[15] DRAM tWR [8] Configuration options: [3]-[31] DRAM tRFC [59] Configuration options: [15]-[255] DRAM tWTR [4] Configuration options: [4]-[31] DRAM tRRD [4] Configuration options: [4]-[15] DRAM tRTP [4] Configuration options: [4]-[15] DRAM tFAW [20] Configuration options: [15]-[63] DRAM Margin Ranks [Disabled] Configuration options: [Enabled] [Disabled] MRC Serial Debug Message Level [Disabled] Configuration options: [Disabled] [Minimum] [Maximum] [Test] Memory ECC Function [Enabled] Allows you to enable or disable Memory ECC fucntion. Configuration options: [Disabled] [Enabled] ASUS P7F-M WS 4-21