Asus PRIME H610M-K Intel 600 series Channel BIOS UM English - Page 39

BCLK TSC HW Fixup, Core Ratio Extension Mode

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Page 39 highlights

SPD Write Disable Allows you to enable or disable setting SPD Write Disable. For security recommendations, SPD write disable bit must be set. Configuration options: [TRUE] [FALSE]PVD Ratio Threshold For the Core Domain PLL, the threshold to switch to lower post divider is 15 by default. You can set a value lower than 15 when pushing high BCLK so that Digitally Controlled Oscillator (DCO) remains at reasonable frequency. Configuration options: [Auto] [1] - [40] Banding Ratio Use the or to adjust the value. Configuration options: [Auto] [0] - [120] SA PLL Frequency Override Allows you to configure Sa PLL Frequency. Configuration options: [Auto] [3200 MHz] [1600 MHz] BCLK TSC HW Fixup Allows you to enable or disable BCLK TSC HW Fixup disable during TSC copy from PMA to APIC. Configuration options: [Enabled] [Disabled] Core Ratio Extension Mode Allows you to enable or disable Core Ratio Above 85 Extension Mode. [Disabled] Max Overclocking Ratio Limit as specified by OCMB 0x1 command is 85. [Enabled] Max Overclocking Ratio Limit as specified by OCMB 0x1 command is 120. FLL OC mode Configuration options: [Auto] [Disabled] [Normal] [Elevated] [Extreme Elevated] Core PLL Voltage Allows you to configure the offset for the Core PLL VCC Trim. The values range from 0.900V to 1.845V with an interval of 0.015V. Configuration options: [Auto] [0.90000] - [1.84500] GT PLL Voltage Allows you to configure the offset for the GT PLL VCC Trim. The values range from 0.900V to 1.845V with an interval of 0.015V. Configuration options: [Auto] [0.90000] - [1.84500] Ring PLL Voltage Allows you to configure the offset for the Ring PLL VCC Trim. The values range from 0.900V to 1.845V with an interval of 0.015V. Configuration options: [Auto] [0.90000] - [1.84500] System Agent PLL Voltage Allows you to configure the offset for the System Agent PLL VCC Trim. The values range from 0.900V to 1.845V with an interval of 0.015V. Configuration options: [Auto] [0.90000] - [1.84500] PRIME / ProArt / TUF GAMING Intel 600 Series BIOS Manual 39

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PRIME / ProArt / TUF GAMING Intel 600 Series BIOS Manual
39
SPD Write Disable
Allows you to enable or disable setting SPD Write Disable. For security
recommendations, SPD write disable bit must be set.
Configuration options: [TRUE] [FALSE]
PVD Ratio Threshold
For the Core Domain PLL, the threshold to switch to lower post divider is 15 by
default. You can set a value lower than 15 when pushing high BCLK so that Digitally
Controlled Oscillator (DCO) remains at reasonable frequency.
Configuration options: [Auto] [1] - [40]
Banding Ratio
Use the <+> or <-> to adjust the value.
Configuration options: [Auto] [0] - [120]
SA PLL Frequency Override
Allows you to configure Sa PLL Frequency.
Configuration options: [Auto] [3200 MHz] [1600 MHz]
BCLK TSC HW Fixup
Allows you to enable or disable BCLK TSC HW Fixup disable during TSC copy from
PMA to APIC.
Configuration options: [Enabled] [Disabled]
Core Ratio Extension Mode
Allows you to enable or disable Core Ratio Above 85 Extension Mode.
[Disabled]
Max Overclocking Ratio Limit as specified by OCMB 0x1 command
is 85.
[Enabled]
Max Overclocking Ratio Limit as specified by OCMB 0x1 command
is 120.
FLL OC mode
Configuration options: [Auto] [Disabled] [Normal] [Elevated] [Extreme Elevated]
Core PLL Voltage
Allows you to configure the offset for the Core PLL VCC Trim. The values range from
0.900V to 1.845V with an interval of 0.015V.
Configuration options: [Auto] [0.90000] - [1.84500]
GT PLL Voltage
Allows you to configure the offset for the GT PLL VCC Trim. The values range from
0.900V to 1.845V with an interval of 0.015V.
Configuration options: [Auto] [0.90000] - [1.84500]
Ring PLL Voltage
Allows you to configure the offset for the Ring PLL VCC Trim. The values range from
0.900V to 1.845V with an interval of 0.015V.
Configuration options: [Auto] [0.90000] - [1.84500]
System Agent PLL Voltage
Allows you to configure the offset for the System Agent PLL VCC Trim. The values
range from 0.900V to 1.845V with an interval of 0.015V.
Configuration options: [Auto] [0.90000] - [1.84500]