Asus Striker Extreme Motherboard Installation Guide - Page 1

Debug Code Table Code CPU INIT DET CPU CHIPINIT DET DRAM DC FCODE EFSHADOW DC XCODE INIT IO CLR SCRN INIT8042 ENABLEKB DIS MS R/W FSEG DET FLASH TESTCMOS PRG CHIP INIT CLK CHECKCPU INTRINIT REC MPS Reserved Reserved SET FDD INITINT9 Description CPU Initiation Test CMOS R/W functionality. Early chipset initialization: -Disable shadow RAM -Disable L2 cache (socket 7 or below) -Program basic chipset registers Detect memory -Auto-detection of DRAM size, type and ECC. -Auto-detection of L2 cache (socket 7 or below) Expand compressed BIOS code to DRAM Call chipset hook to copy BIOS back to E000 & F000 shadow RAM. Expand the Xgroup codes locating in physical address 1000:0 Initial Superio_Early_Init switch. 1. Blank out screen 2. Clear CMOS error flag 1. Clear 8042 interface 2. Initialize 8042 self-test 1. Test special keyboard controller for Winbond 977 series Super I/O chips. 2. Enable keyboard interface. 1. Disable PS/2 mouse interface (optional). 2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional). 3. Reset keyboard for Winbond 977 series Super I/O chips. Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keep beeping the speaker. Auto detect flash type to load appropriate flash R/W codes into the run time area in F000 for ESCD & DMI support. Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real-time clock power status, and then check for override. Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers. Initial Early_Init_Onboard_Generator switch. Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686). Initial interrupts vector table. If no special specified, all H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR. Initial EARLY_PM_INIT switch. Load keyboard matrix (notebook platform) HPM initialization (notebook platform) 1. Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute. 2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead. 3. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD's legacy information. 4. Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots. 5. Early PCI initialization: -Enumerate PCI bus number -Assign memory & I/O resource -Search for a valid VGA device & VGA BIOS, and put it nto C000:0. Initialize INT 09 buffer Debug Code Table