Biostar P4TDP P4TDP BIOS setup guide - Page 14

P4TDP BIOS Setup Active to Precharge Delay This item controls the number of DRAM clocks to activate the precharge delay. The Choices: 7 (default), 6, 5. DRAM RAS# to CAS# Delay This field let you insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from, or refreshed. Fast gives faster performance; and slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The Choices: 3 (default), 2. DRAM RAS# Precharge If an insufficient number of cycle is allowed for RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete, and the DRAM may fail to retain data. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The Choices: 3 (default), 2. DRAM Data Integrity Mode This item select supported ECC or Non-ECC for DRAM. The Choices: Non-ECC (default), ECC. Memory Frequency (Host:DRAM) This item allows you to select the Memory Frequency(Host:DRAM). The Choices: Auto (default), 1:1, 1:1.33. Dram Read Thermal Mgmt The Intel 845 Chipset MCH provides Memory Thermal Management functionality. It increases the system reliability by decreasing thermal stress on system memory and on the Intel 845 Chipset MCH. The Choices: Disabled (default), Enabled. System BIOS Cacheable Selecting Enabled allows you caching of the system BIOS ROM at F0000h~FFFFFh, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Enabled (default), Disabled. Video BIOS Cacheable Select Enabled allows caching of the video BIOS, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Disabled (default), Enabled. 13