Dell PowerEdge FC630 Dell PowerEdge FC630 Owners Manual - Page 5

Purpose? e.g. boot, How is data input to this memory?, How is this memory write protected? - idrac

Page 5 highlights

Item Backplane SEP internal flash FC630 2x2.5" PCIe SSD Backplane SEP internal flash IDSDM Card IDSDM SPI flash rSPI flash rSPI Card rSPI flash Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g. boot code) Integrated Flash+EEPROM Yes Backplane controller Integrated Flash+EEPROM Yes SPI Flash Yes SPI Flash No SPI Flash No Backplane controller Source code for IDSDM controller rSPI function rSPI function Item Planer PCH Internal CMOS RAM BIOS SPI Flash iDRAC SPI Flash How is data input to this memory? How is this memory write protected? BIOS SPI interface via PCH SPI interface via iDRAC NVRAM_CLR jumper Software write protected Software write protected BMC EMMC NAND Flash interface via iDRAC BMC Memory CPU Vcore and Memory regulator System CPLD Memory interface via iDRAC OTP(one time programmable) System OS RAM Embedded FW write protected Not applicable Not accessible System OS Dell - Internal Use - Confidential Dell - Internal Use - Confidential

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Dell - Internal Use - Confidential
Dell - Internal Use - Confidential
Item
Type (e.g. Flash PROM, EEPROM)
Can user
programs or
operating system
write data to it
during normal
operation?
Purpose? (e.g. boot
code)
Backplane
SEP internal flash
Integrated Flash+EEPROM
Yes
Backplane
controller
FC630 2x2.5" PCIe
SSD Backplane
SEP internal flash
Integrated Flash+EEPROM
Yes
Backplane
controller
IDSDM Card
IDSDM SPI flash
SPI Flash
Yes
Source code for
IDSDM controller
rSPI flash
SPI Flash
No
rSPI function
rSPI Card
rSPI flash
SPI Flash
No
rSPI function
Item
How is data input to this memory?
How is this memory write protected?
Planer
PCH Internal CMOS RAM
BIOS
NVRAM_CLR jumper
BIOS SPI Flash
SPI interface via PCH
Software write protected
iDRAC SPI Flash
SPI interface via iDRAC
Software write protected
BMC EMMC
NAND Flash interface via iDRAC
Embedded FW write protected
BMC Memory
Memory interface via iDRAC
Not applicable
CPU Vcore and Memory
regulator
OTP(one time programmable)
Not accessible
System CPLD
System OS RAM
System OS