Dell PowerEdge R430 Dell PowerEdge R430 Owners Manual - Page 7

System CPLD RAM Not utilized Not accessible System Memory System OS OS Control Internal USB Key USB interface via PCH. Accessed via system OS No write protect CPU Various Various iDRAC DDR iDRAC Firmware NA iDRAC iDRAC Firmware NA LOM EEPROM SPI interface via i350 NA LOM Flash SPI interface via i350 NA Expander FRU image I2C interface via expander Hardware strapping BP FRU image I2C interface via iDRAC Hardware strapping Power Supplies PSU FW Different vendors have NA different utilities and tools to load the data to memory. It can also be loaded by Dell Update Package from LC or OS (Windows and Linux) Not accessible Reboot or power down system Can be cleared in system OS Power off Power off Power off Not user clearable Not user clearable Not user clearable Not user clearable Protected by the embedded microcontroller. Special keys are used by special vendor provided utilities to unlock the ROM with various CRC checks during load. 1U 4x3.5", 1U 10x2.5" and 1U 8x2.5"Backplanes SEP internal flash I2C interface via iDRAC Program write protect Not user clearable bit SAS12G HBA Card NVSRAM ROC writes configuration Not WP. Not visible to Cannot be cleared with existing tools data to NVSRAM Host Processor available to the customer FRU Programmed at ICT during Not WP production Cannot be cleared with existing tools available to the customer 1-Wire EEPROM ROC writes data to this memory Not WP. Not visible to Cannot be cleared with existing tools Host Processor available to the customer SBR Pre-programmed before Not WP. Not visible to Cannot be cleared with existing tools assembly Host Processor available to the customer Flash Pre-programmed before Not WP. Not visible to Cannot be cleared with existing tools assembly. Can be updated Host Processor available to the customer Dell - Internal Use - Confidential