Dell PowerEdge R730 Dell PowerEdge R730 and R730xd Owners Manual - Page 11

SDRAM ROC writes to this memory - using it as cache for data IO to HDDs Not WP. Not visible to Host Processor Cache can be cleared by powering off the card H330, H330M PERC NVSRAM ROC writes configuration Not WP. Not visible to Cannot be cleared with existing tools data to NVSRAM Host Processor available to the customer FRU Programmed at ICT during Not WP production Cannot be cleared with existing tools available to the customer 1-Wire EEPROM ROC writes data to this memory Not WP. Not visible to Cannot be cleared with existing tools Host Processor available to the customer SBR Pre-programmed before Not WP. Not visible to Cannot be cleared with existing tools assembly Host Processor available to the customer Flash Pre-programmed before assembly. Can be updated using Dell/LSI tools Not WP. Not visible to Host Processor Cannot be cleared with existing tools available to the customer PCIe SSD Extension Card Switch Configuration EEPROM The EEPROM image is preloaded at factory before assembly. Once assembled on the card, data can be entered via PLX Device Editor or PLX EEP DOS based tool. Device can be write protected via hardware pin. Alternatively, device contents can be write protected via WPEN bit in status register. System is not functional as intended if corrupted/removed. IDSDM SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable MCU USB3.0 interface via PCH, N/A FW can be updated via iDRAC which runs on Linux Not user clearable Left Ear - R730xd SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable Main Control Panel - R730 SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable TPM Trusted Platform Using TPM Enabled Module (TPM) operating systems SW write protected F2 Setup option Dell - Internal Use - Confidential