Foxconn H61MXV User manual - Page 36

Memory Timing Configuration

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Memory Timing Configuration Aptio Setup Utility - C opyright (C) 2012 American Megatrends, Inc. F-Center Memory Multiplier Configuration Performance Memory Profiles XMP Profile 1 XMP Profile 2 [Manual] Not Supported Not Supported The selection of Performance Memory Profiles which impacts memory sizing behavior. Memory Timing Configuration Memory Clock Multiplier Memory Multiplirer tCL tRP tRCD tRAS tWR tRFC tWTR tRRD tRTP tFAW Intel Graphics Configuration [1.33] [13.33] 9 9 9 24 10 74 5 4 5 20 → ←: Select Screen ↑ ↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Reset ESC: Exit Graphics Core Ratio Limit 22 Version 2.14.1219. Copyright (C) 2012 American Megatrends, Inc. 3 ► CAS Latency (tCL) The number of memory clocks it takes a DRAM to return data after the read CAS_L is assert ed depends on the memory clock frequency. The value that BIOS programs into the memory controller is a function of the target clock frequency. The target clock frequency is determined from the supported CAS latencies at given clock frequencies of each DIMM. ► Row Precharge Time (tRPmin) This item allows you to select the row precharge time (in clock cycles). ► CAS to RAS(tRCDmin) This item allows you to select a delay time (in clock cycles) between the CAS# and RAS# strobe signals. ► Active to Precharge(tRASmin) This item allows you to set the minimum RAS# active time (in clock cycles). ► Write Recovery(tWRmin) This item allows you to select the write recovery time (in clock cycles). ► Refresh Recovery(tRFCmin) Refresh to Refresh or Refresh to Active command interval. ► Internal Write to Read Command(tWTR) This item allows you to select a delay time (in clock cycles) between sending the last data from a write operation to the memory and issuing a read command. ► Row Active to Row Active(tRRDmin) This item allows you to select a delay time (in clock cycles) between the RAS# and RAS# strobe signals. ► Read CAS# Precharge Delay (tRTP) 29

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Memory Timing Configuration
Version 2.14.1219. Copyright (C) 2012 American Megatrends, Inc.
Aptio Setup Utility - Copyright (C) 2012 American Megatrends, Inc.
Memory Multiplier Configuration
Performance Memory Profiles
[Manual]
XMP Profile 1
Not Supported
XMP Profile 2
Not Supported
Memory Timing Configuration
Memory Clock Multiplier
[1.33]
Memory Multiplirer
[13.33]
tCL
9
tRP
9
tRCD
9
tRAS
24
tWR
10
tRFC
74
tWTR
5
tRRD
4
tRTP
5
tFAW
20
Intel Graphics Configuration
Graphics Core Ratio Limit
22
→ ←: Select Screen
↑ ↓: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Reset
ESC: Exit
The selection of Performance
Memory Profiles which impacts
memory sizing behavior.
F-Center
► CAS Latency (tCL)
The number of memory clocks it takes a DRAM to return data after the read CAS_L is assert
ed depends on the memory clock frequency. The value that BIOS programs into the memory
controller is a function of the target clock frequency. The target clock frequency is determined
from the supported CAS latencies at given clock frequencies of each DIMM.
► Row Precharge Time (tRPmin)
This item allows you to select the row precharge time (in clock cycles).
► CAS to RAS(tRCDmin)
This item allows you to select a delay time (in clock cycles) between the CAS# and RAS#
strobe signals.
► Active to Precharge(tRASmin)
This item allows you to set the minimum RAS# active time (in clock cycles).
► Write Recovery(tWRmin)
This item allows you to select the write recovery time (in clock cycles).
► Refresh Recovery(tRFCmin)
Refresh to Refresh or Refresh to Active command interval.
► Internal Write to Read Command(tWTR)
This item allows you to select a delay time
(in clock cycles)
between sending the last data from
a write operation to the memory and issuing a read command.
► Row Active to Row Active(tRRDmin)
This item allows you to select a delay time (in clock cycles) between the RAS# and RAS#
strobe signals.
► Read CAS# Precharge Delay (tRTP)