HP Integrity NonStop NB50000c Technology implementation in HP ProLiant G7 serv - Page 2
Introduction, Processor technologies
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Introduction At HP, we design ProLiant G7 servers with a balanced architecture that maximizes performance across a broad range of applications and workloads. A balanced architecture produces optimum levels of reliability and serviceability through superior engineering and mechanical design using industry-standard and HP-designed server technologies. This paper summarizes the following technologies in ProLiant G7 servers: Processor technologies Memory technologies HP Smart Array technologies Power and thermal technologies Infrastructure management technologies Virtualization technologies Processor technologies ProLiant G7 servers and server blades use multi-core Intel® Xeon® or AMD Opteron™ processors. We classify servers as ―1P‖ for a single-processor socket, ―2P‖ for two-processor sockets, and ―MP‖ for multi-processor sockets. Multi-processor generally means four or more sockets in a single server for processors. Multi-core Intel Xeon processors We use Xeon 5500 and 5600 series processors in ProLiant 100-series servers, ProLiant 300 series servers, and ProLiant 200 and 400-series c-Class server blades. We use Xeon 6500 series and 7500 series processors in multi-processor ProLiant DL 500 and 900 series servers and some ProLiant 600series c-Class server blades. These processors use hafnium-based, 45 nm or 32 nm (5600 series) Hi-k metal gate silicon technology and are based on the Microarchitecture Nehalem. The Microarchitecture Nehalem includes the following: Hyper-Threading (HT) Technology adds Multi-Thread-Level Parallelism (MTLP) to reduce latency and improve processor utilization. MTLP lets each processor core receive two threads from the OS to take advantage of idle cycles on the execution units of the processor. Turbo Boost Technology lets a processor run faster than the base operating frequency if it is operating below power and temperature specification limits. QuickPath Technology directly links the processors and I/O chipset with bi-directional, point-to-point QuickPath Interconnect (QPI) links. The QPI links transfer data at up to 6.4 gigatransfers per second (GT/s) with 2 bytes per transfer. This equates to a transfer rate of 12.8GB/s in each direction and a total theoretical bandwidth of 25.6GB/s. QPI has reliability, availability, and serviceability (RAS) features including self-healing links and clock fail-over. Intel Trusted Execution Technology (Intel TXT) complements anti-virus software by increasing protection against software-based attacks and malicious rootkit installations. It protects the hypervisor and BIOS in the server. Xeon 5500 series processors The Intel Xeon 5500 series processor has four cores and a three-level cache hierarchy. Each core has a 64-KB L1 cache and a 256-KB L2 cache. All cores use a shared L3 cache of up to 8MB. The processor has an integrated memory controller with three high-speed channels. Each channel supports up to three DDR3 memory slots providing a maximum of nine dedicated DDR3 memory slots 2