HP Vectra VEi7 HP Vectra VEi7, Technical Reference Manual (Product Description - Page 44

Initialize manager for PCI Option ROMs Rel. 5.1 and earlier, Shadow video BIOS ROM

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Page 44 highlights

3 BIOS Overview Order in Which the POST Tests are Performed Checkpoint Code POST Routine Description 37h Reinitialize the chipset (MB only) 38h Shadow system BIOS ROM 39h Reinitialize the cache (MB only) 3Ah Autosize cache 3Ch Configure advanced chipset registers 3Dh Load alternate registers with CMOS values 40h Set initial CPU speed 42h Initialize interrupt vectors 44h Initialize BIOS interrupts 45h POST device initialization 47h Initialize manager for PCI Option ROMs (Rel. 5.1 and earlier) 48h Check video configuration against CMOS 49h Initialize PCI bus and devices 4Ah Initialize all video adapters in system 4Bh Display QuietBoot screen 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 50h Display CPU type 51h Initialize EISA board 52h Test keyboard 54h Set key click if enabled 56h Enable keyboard 59h Initialize POST display service 44

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3
BIOS Overview
Order in Which the POST Tests are Performed
44
37h
Reinitialize the chipset (MB only)
38h
Shadow system BIOS ROM
39h
Reinitialize the cache (MB only)
3Ah
Autosize cache
3Ch
Configure advanced chipset registers
3Dh
Load alternate registers with CMOS values
40h
Set initial CPU speed
42h
Initialize interrupt vectors
44h
Initialize BIOS interrupts
45h
POST device initialization
47h
Initialize manager for PCI Option ROMs (Rel. 5.1 and earlier)
48h
Check video configuration against CMOS
49h
Initialize PCI bus and devices
4Ah
Initialize all video adapters in system
4Bh
Display QuietBoot screen
4Ch
Shadow video BIOS ROM
4Eh
Display BIOS copyright notice
50h
Display CPU type
51h
Initialize EISA board
52h
Test keyboard
54h
Set key click if enabled
56h
Enable keyboard
59h
Initialize POST display service
Checkpoint
Code
POST Routine Description