Intel BLKDG965PZMKR Product Specification - Page 44
Fixed I/O Map
 |
UPC - 735858180665
View all Intel BLKDG965PZMKR manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 44 highlights
Intel Desktop Board DG965PZ Technical Product Specification 2.3 Fixed I/O Map Table 14. I/O Map Address (hex) Size Description 0000 - 00FF 0228 - 022F (Note 1) 0278 - 027F (Note 1) 02E8 - 02EF (Note 1) 02F8 - 02FF (Note 1) 0378 - 037F 03B0 - 03BB 03C0 - 03DF 03E8 - 03EF 03F8 - 03FF 04D0 - 04D1 LPTn + 400 0CF8 - 0CFB (Note 2) 0CF9 (Note 3) 0CFC - 0CFF 256 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 12 bytes 32 bytes 8 bytes 8 bytes 2 bytes 8 bytes 4 bytes 1 byte 4 bytes Used by the Desktop Board DG965PZ. Refer to the ICH8 data sheet for dynamic addressing information. LPT3 LPT2 COM4 COM2 LPT1 Intel 82G965 GMCH Intel 82G965 GMCH COM3 COM1 Edge/level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Reset control register PCI configuration data register Notes: 1. Default, but can be changed to another address range 2. Dword access only 3. Byte access only NOTE Some additional I/O addresses are not available due to ICH8 address aliasing. The ICH8 data sheet provides more information on address aliasing. For information about Obtaining the ICH8 data sheet Refer to Section 1.2 on page 15 44
-
1 -
2
-
3
-
4
-
5
-
6
-
7
-
8
-
9
-
10
-
11
-
12
-
13
-
14
-
15
-
16
-
17
-
18
-
19
-
20
-
21
-
22
-
23
-
24
-
25
-
26
-
27
-
28
-
29
-
30
-
31
-
32
-
33
-
34
-
35
-
36
-
37
-
38
-
39 -
40 -
41 -
42 -
43 -
44 -
45 -
46 -
47 -
48 -
49 -
50
-
51
-
52
-
53
-
54
-
55
-
56
-
57
-
58
-
59
-
60
-
61
-
62
-
63
-
64
-
65
-
66
-
67
-
68
-
69
-
70
-
71
-
72
-
73
-
74
-
75
-
76
-
77
-
78
-
79
-
80
-
81
-
82
-
83
-
84
-
85
-
86
-
87
-
88
-
89
-
90
-
91
-
92
 |
 |
