Intel D915PSY Product Specification - Page 26

Intel® 915P Chipset, IDE Support - audio driver

Page 26 highlights

Intel Desktop Board D915PGN/D915PSY Technical Product Specification 1.7 Intel® 915P Chipset The Intel 915P chipset consists of the following devices: • Intel 82915P Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect • Intel 82801FB I/O Controller Hub (ICH6) with DMI interconnect • Firmware Hub (FWH) The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and the DMI interconnect. The ICH6 is a centralized controller for the board's I/O paths. The FWH provides the nonvolatile storage of the BIOS. For information about The Intel 915P chipset Resources used by the chipset Refer to http://developer.intel.com/ Chapter 2 1.7.1 USB The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and EHCI-compatible drivers. The ICH6 provides the USB controller for all ports. The port arrangement is as follows: • Four ports are implemented with dual stacked back panel connectors adjacent to the audio connectors • Four ports are routed to two separate front panel USB connectors ✏ NOTE Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices. For information about The location of the USB connectors on the back panel The location of the front panel USB connectors on the D915PGN board The location of the front panel USB connectors on the D915PSY board Refer to Figure 17, page 64 Figure 18, page 66 Figure 19, page 68 1.7.2 IDE Support The boards provides five IDE interface connectors: • One parallel ATA IDE connector that supports two devices • Four serial ATA IDE connectors that support one device per connector 1.7.2.1 Parallel ATE IDE Interface The ICH6's Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The Parallel ATA IDE interface supports the following modes: • Programmed I/O (PIO): processor controls data transfer. • 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec. 26

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Intel Desktop Board D915PGN/D915PSY Technical Product Specification
1.7 Intel
®
915P Chipset
The Intel 915P chipset consists of the following devices:
Intel 82915P Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
Intel 82801FB I/O Controller Hub (ICH6) with DMI interconnect
Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect.
The ICH6 is a centralized controller for the board’s I/O paths.
The FWH
provides the nonvolatile storage of the BIOS.
For information about
Refer to
The Intel 915P chipset
Resources used by the chipset
Chapter 2
1.7.1
USB
The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH6 provides the USB controller for all ports.
The port arrangement is as follows:
Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
Four ports are routed to two separate front panel USB connectors
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable.
Use shielded cable that meets the
requirements for full-speed devices.
For information about
Refer to
The location of the USB connectors on the back panel
Figure 17, page 64
The location of the front panel USB connectors on the D915PGN board
Figure 18, page 66
The location of the front panel USB connectors on the D915PSY board
Figure 19, page 68
1.7.2
IDE Support
The boards provides five IDE interface connectors:
One parallel ATA IDE connector that supports two devices
Four serial ATA IDE connectors that support one device per connector
1.7.2.1
Parallel ATE IDE Interface
The ICH6’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The
Parallel ATA IDE interface supports the following modes:
Programmed I/O (PIO):
processor controls data transfer.
8237-style DMA:
DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
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