Intel MFSYS35 Technical Product Specification - Page 42

Intel® Compute Module MFS5520VI TPS Appendix A: Integration and Usage Tips Appendix A: Integration and Usage Tips ƒ When two processors are installed, both must be of identical revision, core voltage, and bus/core speed. Mixed processor steppings are supported as long as they are listed in the processor specification updates published by Intel Corporation. However, the stepping of one processor cannot be greater than one stepping back of the other. ƒ Only Intel® Xeon® Processor 5500 series and Intel® Xeon® Processor 5600 series with 95 W and less Thermal Design Power (TDP) are supported on this compute module. Previous generations of the Intel® Xeon® processors are not supported. Intel® Xeon® Processor 5500 series and Intel® Xeon® Processor 5600 series with TDP higher than 95 W are also not supported. ƒ Processors must be installed in order. CPU 1 is located near the edge of the compute module and must be populated to operate the board. ƒ Only registered DDR3 DIMMs (RDIMMs) and unbuffered DDR3 DIMMs (UDIMMs) are supported on this compute module. Mixing of RDIMMs and UDIMMs is not supported. ƒ Mixing memory type, size, speed, rank and/or memory vendors is not validated and is not supported on this server board. ƒ Non-ECC memory is not validated and is not supported in a server environment ƒ For the best performance, the number of DDR3 DIMMs installed should be balanced across both processor sockets and memory channels. For example, a two-DIMM configuration performs better than a one-DIMM configuration. In a two-DIMM configuration, DIMMs should be installed in DIMM sockets A1 and D1. A six-DIMM configuration (DIMM sockets A1, B1, C1, D1, E1, and F1) performs better than a threeDIMM configuration (DIMM sockets A1, B1, and C1). ƒ For a list of Intel supported operating systems, add-in cards, and peripherals for this server board, see the Intel® Modular Server System and Intel® Compute Module MFS5000SI/MFS5520VI Tested Hardware and Operating System List. ƒ Normal Integrated BMC functionality (for example, KVM, monitoring, and remote media) is disabled with the force BMC update jumper set to the "enabled" position (pins 2-3). The compute module should never be run with the BMC force update jumper set in this position and should only be used when the standard firmware update process fails. This jumper should remain in the default (disabled) position (pins 1-2) when the compute module is running normally. ƒ When performing the BIOS update procedure, the BIOS select jumper must be set to its default position (pins 1-2). Revision 1.5 35 Intel order number: E64311-007