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Product Architecture Overview

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Intel® Server Board S2400BB TPS 3. Product Architecture Overview The architecture of Intel® Server Board S2400BB is developed around the integrated features and functions of the Intel® Xeon® processor E5-2400 product family, the Intel® C602 (-A) chipset, the Intel® Ethernet Controller I350 GbE controller chip, and the Server Engines* Pilot-III Server Management Controller. The following diagram provides an overview of the server board architecture, showing the features and interconnects of each of the major sub-system components. DMI2 x4 Gen2 4GB/s x4 PCIe Gen3 8GB/s x4 PCIe Gen3 8GB/s x16 PCIe Gen3 32GB/s X8 PCIe Gen3 16GB/s (Option) IO Module Connector (15W) Riser Slot 2 X24 PCIe Gen3 MUX x4 PCIe with no 8-port Upgrade Key Installed x16 PCIe Gen3 32GB/s Riser Slot 1 X4 PCIe Gen2 4GB/sGB/s SCU 0 Ports 0-3 Ports 4-7 SCU 1 w/Upgrade Key Intel® C600 RAID Upgrade Key SCU SATA / SAS Ports SATA 1 Port AHCI SATA Ports mSATA Port 9x USB 2.0 SPI 3x USB (9,11,12) LPC (Option) TPM Header 1x USB (2) DDR3 SPI 2x USB (0,1) X1 PCIe Gen 1 400 Mbs Port 1 NCSI 50/100 Mbps 10/100/1000 GbE Analog Video SMBus (8) RGM II 1x USB 2x USB Figure 6. Intel® Server Board S2400BB Functional Block Diagram Revision 1.0 7

Section	Page
1. Introduction	11
1.1 Chapter Outline	11
1.2 Server Board Use Disclaimer	11
1.3 Product Errata	11
2. Product Overview	12
2.1 Server Board Component / Feature Identification	14
3. Product Architecture Overview	17
3.1 Processor Support	18
3.1.1 Processor Socket Assembly	18
3.1.2 Processor Population Rules	19
3.1.3 Processor Initialization Error Summary	19
3.1.4 Processor Thermal Design Power (TDP) Support	21
3.2 Processor Functions Overview	22
3.2.1 Intel® QuickPath Interconnect	22
3.2.2 Integrated Memory Controller (IMC) and Memory Subsystem	23
3.2.2.1 Supported Memory	24
3.2.2.2 Memory Slot Identification and Population Rules	25
3.2.2.3 Publishing System Memory	27
3.2.2.4 Integrated Memory Controller Operating Modes and RAS Support	27
3.2.2.4.1 Independent Channel Mode	28
3.2.2.4.2 Lockstep Channel Mode	28
3.2.2.5 Mirrored Channel Mode	28
3.2.2.6 Rank Sparing Mode	29
3.2.2.7 Single Device Data Correction (SDDC)	29
3.2.2.8 Error Correction Code (ECC) Memory	29
3.2.2.8.1 Correctable Memory ECC Error Handling	29
3.2.2.8.2 Uncorrectable Memory ECC Error Handling	30
3.2.2.9 Demand Scrubbing for ECC Memory	30
3.2.2.10 Patrol Scrubbing for ECC Memory	30
3.2.3 Processor Integrated I/O Module (IIO)	30
3.2.3.1 Riser Card Support	32
3.2.3.2 I/O Module Support	34
3.3 Intel® C602 (-A) Chipset Functional Overview	35
3.3.1 Low Pin Count (LPC) Interface	35
3.3.2 Universal Serial Bus (USB) Controller	35
3.3.2.1 eUSB SSD Support	36
3.3.3 Network Interface	36
3.3.4 Chipset Embedded AHCI SATA Controller	38
3.3.4.1 mSATA SSD Support	39
3.3.5 Chipset Embedded SCU SATA/SAS Controller	39
3.3.6 Embedded Software RAID Support	40
3.3.6.1 Intel® Embedded Server RAID Technology 2 (ESRT2)	41
3.3.6.2 Intel® Rapid Storage Technology (RSTe)	41
3.3.7 Manageability	41
3.4 Integrated Baseboard Management Controller Overview	42
3.4.1 Super I/O Controller	43
3.4.1.1 Keyboard and Mouse Support	43
3.4.1.2 Wake-up Control	43
3.4.2 Graphics Controller and Video Support	43
3.4.3 Baseboard Management Controller	44
3.4.3.1 Remote Keyboard, Video, Mouse, and Storage (KVMS) Support	45
3.4.3.2 Integrated BMC Embedded LAN Channel	45
4. System Security	46
4.1 BIOS Password Protection	46
4.2 Trusted Platform Module (TPM) Support	47
4.2.1 TPM security BIOS	47
4.2.2 Physical Presence	47
4.2.3 TPM Security Setup Options	48
4.2.3.1 Security Screen	48
4.3 Intel® Trusted Execution Technology	49
5. Technology Support	50
5.1 Intel® Virtualization Technology – Intel® VT-x/VT-d/VT-c	50
5.2 Intel® Intelligent Power Node Manager	50
5.2.1 Hardware Requirements	52
6. Platform Management Functional Overview	53
6.1 Baseboard Management Controller (BMC) Firmware Feature Support	53
6.1.1 IPMI 2.0 Features	53
6.1.2 Non IPMI Features	54
6.2 Advanced Configuration and Power Interface (ACPI)	55
6.3 Power Control Sources	56
6.4 BMC Watchdog	56
6.5 Fault Resilient Booting (FRB)	57
6.6 Sensor Monitoring	57
6.7 Field Replaceable Unit (FRU) Inventory Device	57
6.8 System Event Log (SEL)	58
6.9 System Fan Management	58
6.9.1 Thermal and Acoustic Management	58
6.9.2 Thermal Sensor Input to Fan Speed Control	59
6.9.3 Memory Thermal Throttling	60
6.10 Messaging Interfaces	60
6.10.1 User Model	61
6.10.2 IPMB Communication Interface	61
6.10.3 LAN Interface	61
6.10.3.1 RMCP/ASF Messaging	62
6.10.3.2 BMC LAN Channels	62
6.10.3.2.1 Baseboard NICs	62
6.10.3.2.2 Dedicated Management Channel	62
6.10.3.2.3 Concurrent Server Management Use of Multiple Ethernet Controllers	62
6.10.3.3 IPV6 Support	63
6.10.3.4 LAN Failover	64
6.10.3.5 BMC IP Address Configuration	64
6.10.3.5.1 Static IP Address (IP Address Source Values 0h, 1h, and 3h)	64
6.10.3.5.2 Static LAN Configuration Parameters	65
6.10.3.5.3 Enabling/Disabling Dynamic Host Configuration (DHCP) Protocol	65
6.10.3.5.4 DHCP-related LAN Configuration Parameters	65
6.10.3.6 DHCP BMC Hostname	66
6.10.4 Address Resolution Protocol (ARP)	66
6.10.5 Internet Control Message Protocol (ICMP)	66
6.10.6 Virtual Local Area Network (VLAN)	66
6.10.7 Secure Shell (SSH)	67
6.10.8 Serial-over-LAN (SOL 2.0)	67
6.10.9 Platform Event Filter (PEF)	68
6.10.10 LAN Alerting	68
6.10.10.1 SNMP Platform Event Traps (PETs)	68
6.10.11 Alert Policy Table	68
6.10.11.1 E-mail Alerting	68
6.10.12 SM-CLP (SM-CLP Lite)	69
6.10.13 Embedded Web Server	69
6.10.14 Virtual Front Panel	70
6.10.15 Embedded Platform Debug	71
6.10.15.1 Output Data Format	72
6.10.15.2 Output Data Availability	72
6.10.15.3 Output Data Categories	72
6.10.16 Data Center Management Interface (DCMI)	73
6.10.17 Lightweight Directory Authentication Protocol (LDAP)	73
7. Advanced Management Feature Support (RMM4)	74
7.1 Keyboard, Video, Mouse (KVM) Redirection	75
7.1.1 Remote Console	76
7.1.2 Performance	76
7.1.3 Security	76
7.1.4 Availability	76
7.1.5 Usage	76
7.1.6 Force-enter BIOS Setup	76
7.2 Media Redirection	76
7.2.1 Availability	77
7.2.2 Network Port Usage	77
8. On-board Connector/Header Overview	78
8.1 Power Connectors	78
8.1.1 Main Power	78
8.1.2 Riser Card Power Connectors	80
8.1.3 Hot Swap Backplane Power Connector	80
8.1.4 Peripheral Drive Power Connector	80
8.2 Front Panel Headers and Connectors	81
8.2.1 Front Panel Support	81
8.2.1.1 Power / Sleep Button and LED Support	81
8.2.1.2 System ID Button and LED Support	82
8.2.1.3 System Reset Button Support	82
8.2.1.4 NMI Button Support	82
8.2.1.5 NIC Activity LED Support	82
8.2.1.6 Hard Drive Activity LED Support	83
8.2.1.7 System Status LED Support	83
8.2.2 Front Panel USB Connector	84
8.2.3 Front Panel Video Connector	84
8.2.4 Intel® Local Control Panel Connector	85
8.3 On-Board Storage Connectors	85
8.3.1 Single Port SATA Only Connectors	85
8.3.2 Multiport Mini-SAS/SATA Connectors	85
8.3.3 Internal Type-A USB Connector	87
8.3.4 Internal 2mm Low Profile eUSB SSD Connector	87
8.4 Fan Connectors	87
8.5 Serial Port Connectors	88
8.6 Other Connectors and Headers	89
9. Reset & Recovery Jumpers	90
9.1 BIOS Recovery Jumper	91
9.2 Management Engine (ME) Firmware Force Update Jumper Block	91
9.3 Password Clear Jumper Block	92
9.4 BIOS Default Jumper Block	92
9.5 BMC Force Update Jumper Block	93
10. Light Guided Diagnostics	94
10.1 System ID LED	95
10.2 System Status LED	95
10.3 BMC Boot/Reset Status LED Indicators	97
10.4 Post Code Diagnostic LEDs	97
10.5 12 Volt Stand-By Present LED	97
10.6 Fan Fault LEDs	97
10.7 Memory Fault LEDs	97
10.8 CPU Fault LEDs	98
10.9 System Power Good LED	98
10.10 CATERR LED	98
11. Power Supply Specification Guidelines	99
11.1.1 Power Supply DC Output Connector	99
11.1.2 Power Supply DC Output Specification	100
11.1.2.1 Output Power / Currents	100
Notes:.	100
11.1.2.2 Standby Output	100
11.1.2.3 Voltage Regulation	100
11.1.2.4 Dynamic Loading	101
11.1.2.5 Capacitive Loading	101
11.1.2.6 Grounding	101
11.1.2.7 Closed loop stability	101
11.1.2.8 Residual Voltage Immunity in Standby mode	101
11.1.2.9 Common Mode Noise	102
11.1.2.10 Soft Starting	102
11.1.2.11 Zero Load Stability Requirements	102
11.1.2.12 Hot Swap Requirements	102
11.1.2.13 Forced Load Sharing	102
11.1.2.14 Ripple / Noise	102
11.1.2.15 Timing Requirements	103
12. <F2> BIOS Setup Utility	105
12.1 BIOS Setup Operation	105
12.1.1 Entering BIOS Setup	105
12.1.2 Setup Navigation Keyboard Commands	105
Table 51. BIOS Setup: Keyboard Command Bar	106
Appendix A: Integration and Usage Tips	107
Appendix B: Integrated BMC Sensor Tables	108
Appendix C: Management Engine Generated SEL Event Messages	122
Appendix D: POST Code Diagnostic LED Decoder	124
Appendix E: POST Code Errors	129