LG E700S Service Manual - Page 34

BLOCK DIAGRAM FOR TDA4853/4857 - 34 - VSYNC 14 (TTL level) VERTICAL SYNC INPUT AND POLARITY CORRECTION 22 kΩ (1%) 100 nF (5%) EHT compensation via vertical size 150 EHT compensation nF via horizontal size VREF VCAP VAGC 23 24 22 VSMOD HSMOD 21 31 EWDRV 11 VERTICAL SYNC INTEGRATOR VERTICAL OSCILLATOR AND AGC EHT COMPENSATON HORIZONTAL SIZE AND VERTICAL SIZE EW-OUTPUT HORIZONTAL PINCUSHION HORIZONTAL CORNER HORIZONTAL TRAPEZIUM HORIZONTAL SIZE 7V 12V VERTICAL OUTPUT 12 VERTICAL LINEARITY VERTICAL LINEARITY 13 BALANCE VOUT2 VOUT1 Clamping Blanking CLBL 16 VIDEO CLAMPING AND VERTICAL BLANK VERTICAL POSITION VERTICAL SIZE, VOVSCN HUNLOCK 17 HUNLOCK OUTPUT 19 SDA SCL 18 VCC 9.2 to 16V 10 PGND 7 SGND 25 I2C-BUS RECEIVER SUPPLY AND REFERENCE PRETECTION AND SOFT START 2 I2C-BUS REGISTERS COINCIDENCE DETECTOR FREQUENCY DETECTOR TV MODE TDA4857 X-RAY PRETECTION FOCUS VERTICAL B+ CONTROL 20 i.c 32 FOCUS 6 BDRV 4 BSENS 3 BOP 5 BIN X-RAY B+ CONTOL A P P L I C AT I O N HSYNC (TTL level) (video) 15 H/C SYNC INPUT AND POLARITY CORRECTION PLL1 AND HORIZONTAL POSITION HORIZONTAL OSCILLATOR 26 27 HPLL1 HBUF 28 HREF 29 HCAP 3.3KΩ 100nF 8.2 RHBUF 10nF nF R HREF (2%) (1%) PLL2, PARALLELOGRAM, PIN UNBALANCE AND SOFT START 30 1 HPLL2 92 8.2nF HFLB XSEL XRAY HORIZONTAL OUTPUT STAGE 8 HDRV