LG KU950 Service Manual - Page 40

External memory interface - specs

Page 40 highlights

3. TECHNICAL BRIEF 3.9. External memory interface The MSM6275 have two external memory interfaces with arbitration for the multi-layer AHB system and memory controllers. The EBI1 bus is a high performance bus that supports a wide variety of memories. EBI2 bus is targeted to be the interface for slow peripheral devices(i,.e., LCD) as well as the NAND flash memory. • EBI1 Features - 16 bit static and dynamic memory interface - 32 bit dynamic memory interface - 24 bits of address for static memory devices which can support up to 32MBytes on each chip select - Synchronous burst memories supported (burst NOR, burst PSRAM) - Synchronous DRAM memories supported - Byte addressable memory supporting 8 bit, 16 bit and 32 bit accesses - Pseudo SRAM (PSRAM) memory support • EBI2 Features - Support for asynchronous FLASH and SRAM(16bit & 8bit). - Interface support for byte addressable 16bit devices(UB_N & LB_N signals). - 2Mbytes of memory per chip select. - Support for 8 bit wide NAND flash. - Support for parallel LCD interfaces, port mapped of memory mapped(16 & 8 bit) • 1GMb NAND flash memory + 512Mb SDRAM (1die) Device FLASH SDRAM Part Name TY9000A800EOGG TY9000A800EOGG Interface Spec Maker Toshiba Toshiba Read Access Time Write Access Time 35 ns/Bytes 50 ns/Bytes 107 ns/4Double Word 53 ns/4Double Word Table. External memory interface for KU950 - 41 -

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3. TECHNICAL BRIEF
- 41 -
3.9. External memory interface
The MSM6275 have two external memory interfaces with arbitration for the multi-layer AHB system
and memory controllers. The EBI1 bus is a high performance bus that supports a wide variety of
memories. EBI2 bus is targeted to be the interface for slow peripheral devices(i,.e., LCD) as well as
the NAND flash memory.
• EBI1 Features
- 16 bit static and dynamic memory interface
- 32 bit dynamic memory interface
- 24 bits of address for static memory devices which can support up to 32MBytes on each chip select
- Synchronous burst memories supported (burst NOR, burst PSRAM)
- Synchronous DRAM memories supported
- Byte addressable memory supporting 8 bit, 16 bit and 32 bit accesses
- Pseudo SRAM (PSRAM) memory support
• EBI2 Features
- Support for asynchronous FLASH and SRAM(16bit & 8bit).
- Interface support for byte addressable 16bit devices(UB_N & LB_N signals).
- 2Mbytes of memory per chip select.
- Support for 8 bit wide NAND flash.
- Support for parallel LCD interfaces, port mapped of memory mapped(16 & 8 bit)
• 1GMb NAND flash memory + 512Mb SDRAM (1die)
Interface Spec
Device
Part Name
Maker
Read Access Time
Write Access Time
FLASH
TY9000A800EOGG
Toshiba
35 ns/Bytes
50 ns/Bytes
SDRAM
TY9000A800EOGG
Toshiba
107 ns/4Double Word
53 ns/4Double Word
Table. External memory interface for KU950