Lantronix xPico Wi-Fi Embedded Wi-Fi Module Integration Guide - Page 41
Technical Specifications, Category, Description
View all Lantronix xPico Wi-Fi Embedded Wi-Fi Module manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 41 highlights
4: Specifications Technical Specifications Category CPU, Memory Firmware Reset Circuit Serial Interface Serial Line Formats Modem Control Flow Control Programmable I/O Network Interface Compatibility Protocols Supported LEDs Management Security Internal Web Server Weight Material Temperature Warranty Included Software EMI Compliance Table 4-4 xPico Wired Technical Specification Description Lantronix DSTni-EX 186 CPU, 256-Kbyte zero wait state SRAM, 512Kbyte flash, 16-Kbyte boot ROM Upgradeable via TFTP and serial port Internal 200ms power-up reset pulse. Power-drop reset triggered at 2.6V. External reset input causes an internal 200ms reset. CMOS (Asynchronous) 3.3V-level signals Rate is software selectable: 300 bps to 921600 bps Data bits: 7 or 8 Stop bits: 1 or 2 Parity: odd, even, none DTR/DCD, CTS, RTS