MSI Neo4 User Guide - Page 53

Read to Write delay Trwt

Page 53 highlights

MS-7125 ATX Mainboard 3-12 Row to Row delay (Trrd) When the Timing Mode is set to [Manual], the field is adjustable. Specifies the active-to-active delay of different banks. Available settings: [Auto], [2T], [3T], [4T]. Write recovery time (Twr) When the Timing Mode is set to [Manual], the field is adjustable. It specifies the amount of delay (in clock cycles) that must elapse after the completion of a valid write operation, before an active bank can be precharged. This delay is required to guarantee that data in the write buffers can be written to the memory cells before precharge occurs. Available settings: [Auto], [2T], [3T]. Write to Read delay (Twtr) When the Timing Mode is set to [Manual], the field is adjustable. This item controls the Write Data In to Read Command Delay memory timing. This constitutes the minimum number of clock cycles that must occur between the last valid write operation and the next read command to the same internal bank of the DDR device. Available settings: [Auto], [1T], [2T]. Read to Write delay (Trwt) When the Timing Mode is set to [Manual], the field is adjustable. This is not a DRAM-specified timing parameter, but must be considered due to routing latencies on the clock forwarded bus. It is counted from the first address bus slot that was not associated with part of the read burst. Available settings: [Auto], [1T], [2T], [3T], [4T], [5T], [6T]. Refresh period (Tref) When the Timing Mode is set to [Manual], the field is adjustable. Specifies the refresh rate of the DIMM requiring the most frequent refresh. Available settings: [Auto], [1x1552], [1x2064], [1x2592], [1x3120], [1x3632], [1x4128], [1x4672], [2x1552], [2x2064], [2x2592], [2x3120], [2x3632], [2x4128], [2x4672], [4x1552], [4x2064], [4x2592], [4x3120], [4x3632], [4x4128], [4x4672], [128]. User Config mode This field has the capacity to automatically detect all of the following 4 fields default value.. If you set this field to [Manual], the following fields will be selectable. The settings are: [Auto], [Manual]. Bottom of 32-bit [ 31:24] IO When the User Config mode is set to [Manual], the field is adjustable. This field specifies the memory which could be remapped to another address higher than 00E0. (This item only activities in 64-bit OS) The settings are: [0000~00E0]. 1T/ 2T Memory Timing When the User Config mode is set to [Manual], the field is adjustable. This field controls the SDRAM command rate. Selecting [1T] makes SDRAM signal controller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM signal controller run at 2T rate. Setting options: [1T], [2T].

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3-12
MS-7125 ATX Mainboard
Row to Row delay (Trrd)
When the
Timing Mode
is set to [Manual], the field is adjustable. Specifies the
active-to-active delay of different banks. Available settings: [Auto], [2T], [3T],
[4T].
Write recovery time (Twr)
When the
Timing Mode
is set to [Manual], the field is adjustable. It specifies
the amount of delay (in clock cycles) that must elapse after the completion of a
valid write operation, before an active bank can be precharged. This delay is
required to guarantee that data in the write buffers can be written to the
memory cells before precharge occurs. Available settings: [Auto], [2T], [3T].
Write to Read delay (Twtr)
When the
Timing Mode
is set to [Manual], the field is adjustable.
This item
controls the Write Data In to Read Command Delay memory timing. This consti-
tutes the minimum number of clock cycles that must occur between the last
valid write operation and the next read command to the same internal bank of
the DDR device. Available settings: [Auto], [1T], [2T].
Read to Write delay (Trwt)
When the
Timing Mode
is set to [Manual], the field is adjustable. This is not a
DRAM-specified timing parameter, but must be considered due to routing laten-
cies on the clock forwarded bus. It is counted from the first address bus slot
that was not associated with part of the read burst. Available settings: [Auto],
[1T], [2T], [3T], [4T], [5T], [6T].
Refresh period (Tref)
When the
Timing Mode
is set to [Manual], the field is adjustable. Specifies the
refresh rate of the DIMM requiring the most frequent refresh. Available settings:
[Auto], [1x1552], [1x2064], [1x2592], [1x3120], [1x3632], [1x4128], [1x4672],
[2x1552], [2x2064], [2x2592], [2x3120], [2x3632], [2x4128], [2x4672], [4x1552],
[4x2064], [4x2592], [4x3120], [4x3632], [4x4128], [4x4672], [128].
User Config mode
This field has the capacity to automatically detect all of the following 4 fields
default value.. If you set this field to [Manual], the following fields will be selectable.
The settings are: [Auto], [Manual].
Bottom of 32-bit [ 31:24] IO
When the
User Config mode
is set to [Manual], the field is adjustable. This field
specifies the memory which could be remapped to another address higher than
00E0. (This item only activities in 64-bit OS)
The settings are: [0000~00E0].
1T/ 2T Memory Timing
When the
User Config mode
is set to [Manual], the field is adjustable. This field
controls the SDRAM command rate. Selecting [1T] makes SDRAM signal con-
troller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM signal
controller run at 2T rate. Setting options: [1T], [2T].