Pioneer MJ-17D Service Manual - Page 57

MJ-D707, MJ-17D Pin Function No. Name I/O Description 1 G1/A1 Output terminals used jointly for the FDP timing signal (grid connection) and the 2 G0/A0 O/O segment signal (anode connection). 3 NC -- NC (connected to VDD) 4 PE0/INT0/EC0 I/I/I Timer/counter external event input terminal 5 PE1/INT1/EC1 6 PE2/INT2 I/I External interrupt request input terminal 7 PE3/INT3/NMI I/I/I Nonmaskable interrupt request input terminal 8 PE4/RMC I/I Remote control reception circuit input terminal 9 PE5 10 PE6/PWM O/O 14 bit PWM output terminal 11 PE7/TO/ADJ O/O/O 16 bit timer/counter rectangular waveform output, 32 kHz oscillation division output terminal 12 PC0/KR0 Key return input terminal for performing of | | IO/I key scanning with the FDP segment signal 19 PC7/KR7 20 PB0/CINT IO/I External capture input terminal to the 16 bit timer/counter 21 PB1/CS0 I Serial interface (CH0) chip select input terminal 22 PB2/SCK0 IO/IO Serial clock (CH0) Input/Output terminal 23 PB3/SI0 IO/I Serial data (CH0) input terminal 24 PB4/SO0 IO/O Serial data (CH0) output terminal 25 PB5/SCK1 IO/IO Serial clock (CH1) Input/Output terminal 26 PB6/SC1 IO/I Serial data (CH1) input terminal 27 PB7/SO1 IO/O Serial data (CH1) output terminal 28 AVREF -- A/D converter reference voltage input terminal 29 PA0/AN0 | | 36 PA7/AN7 I/O A/D converter analog input terminal 37 AVss -- A/D converter GND terminal 38 RST System reset terminal, L: Active 39 EXTAL 40 XTAL I System clock oscillation crystal connection terminal O 41 Vss -- GND terminal 42 TX 43 TEX O Crystal connection terminal for 32 kHz timer counter clock oscillation I 44 VDD -- Positive power supply terminal 45 VFDP -- FDP voltage supply terminal when the internal resistor is specified by the mask option. No. Name I/O Description 46 PD0/A55 | | 53 PD7/A48 54 PF0/A47 | | 61 PF7/A40 62 PG0/A39 FDP segment signal (anode connection) | | O/O output terminal 69 PG7/A32 70 PH0/A31 | | 77 PH7/A24 78 A23 | | O 85 A16 86 G15/A15 Output terminals for FDP timing signal | | O/O (grid connection) and segment signal 88 G13/A13 (anode connection) 89 VDD -- Positive power supply terminal 90 G12/A12 | | 100 G2/A2 Output terminals for FDP timing signal O/O (grid connection) and segment signal (anode connection) Note: The NC terminal of pin 3 must be connected to VDD. Connect the VDD terminals of pin 44 and pin 89 both to VDD. 57