Sharp SD-EX101 Service Manual - Page 68

SD-EX100 SD-EX101 IC301 VHiLC75341M-1: Audio Processor (LC75341M) Pin No. Terminal Name Function 1 DI Serial data and clock input terminal for control. 2 CE Chip enable terminal. When changing from "H" to "L", data is written in the internal latch and each analog switch is turned on. Data transmission is enabled at "H" level. 3 VSS Ground terminal. 4 LOUT Bass band filter construction capacitor/resistor connection terminal and bass/treble output terminal. 5 LBASS Bass band filter capacitor and resistor connection terminal. 6 LTRE Treble band filter capacitor connection terminal. 7 LIN L-CH signal input terminal. 8 LSELO Input selector output terminal. 9-12 (11*) L4-L1 Input signal terminal. 13-16 (14*) R1-R4 Input signal terminal. 17 RSELO Input selector output terminal. 18 RIN R-CH signal input terminal. 19 RTRE Treble band filter capacitor connection terminal. 20 RBASS Bass band filter capacitor and resistor connection terminal. 21 ROUT Bass band filter capacitor/resistor connection terminal and bass/treble output terminal. 22 Vref 0.5 × VDD voltage generation section for analog ground. Connect a capacitor of 10 µF or more between Vref and AVSS (VSS) as a countermeasure against the power supply ripple. 23 VDD Power supply terminal. 24 CL Serial data and clock input terminal for control. In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside. CL VDD Vref ROUT RBASS RTRE RIN RSELO R4 R3 R2 R1 24 23 22 21 20 19 18 17 16 15 14 13 LC75341M 1 2 3 4 5 6 7 8 9 10 11 12 87 6 54 LSELO LIN LTRE LBASS LOUT DI CE VSS LOUT LBASS LTRE LIN LSELO L4 L3 L2 L1 L4 9 L3 10 L2 11 L1 12 R1 13 R2 14 R3 15 R4 16 CONTROL CIRCUIT LOGIC CIRCUIT CONTROL CIRCUIT LVref CCB INTERFACE RVref 17 18 19 20 21 RSELO RIN RTRE RBASS ROUT Figure 68 BLOCK DIAGRAM OF IC - 68 - 3 VSS 2 CE 1 DI 24 CL 23 VDD 22 Vref