Sony STR-KS2000 Service Manual - Page 47

IC3509, BR24L02F-WE2, IC3513, SII9030CTU-7

Page 47 highlights

IC3509 BR24L02F-WE2 8bit START STOP 8bit 2kbit EEPROM ARRAY ADDRESS DECODER 8bit SLAVE/ WORD ADDRESS REGISTER DATA REGISTER A0 1 A1 2 CONTROL LOGIC A2 3 ACK GND 4 HIGH VOLTAGE GENERATOR VCC LEVEL DETECT 8 VCC 7 WP 6 SCL 5 SDA IC3513 SII9030CTU-7 DE D0 D1 D2 D3 D4 CVCC18 CGND IOGND IOVCC D5 D6 D7 D8 IDCK D9 D10 D11 D12 D13 HSYNC 1 VSYNC 2 CGND 3 CVCC18 4 SPDIF 5 MCLK 6 SD3 7 SD2 8 SD1 9 SD0 10 WS 11 SCK 12 IOVCC 13 IOGND 14 CGND 15 CVCC18 16 INT 17 HPD 18 DSDA 19 DSCL 20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 VIDEO DATA CAPTURE / DE GEN / 656 LOGIC BLOCK AUDIO DATA CAPTURE LOGIC BLOCK 4: 2: 2 TO 4: 4: 4 CSC XOR HDCP KEYS EEPROM HDCP ENCRYPTION ENGINE 60 CGND 59 CVCC18 58 D14 57 D15 56 D16 55 D17 54 D18 53 D19 52 D20 51 D21 50 D22 49 D23 48 IOVCC 47 IOGND 46 CGND 45 CVCC18 RECEIVER SENS + INTERRUPT LOGIC E-DDC MASTER PANEL LINK TMDS DIGITAL CORE REGISTERS CONFIGURATION LOGIC BLOCK I2C SLAVE 44 CSDA 43 CSCL 42 RESET# 41 CI2CA 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 STR-KS2000 RSVDL PGND1 PVCC1 EXT_SWING AGND TXC- TXC+ AVCC TX0- TX0+ AGND TX1- TX1+ AVCC TX2- TX2+ AGND PVCC2 PGND2 NC 47

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STR-KS2000
47
IC3509
BR24L02F-WE2
1
5
A0
2
A1
3
A2
4
GND
SDA
6
SCL
7
WP
8
VCC
2kbit EEPROM ARRAY
8bit
8bit
ADDRESS
DECODER
SLAVE/ WORD
ADDRESS REGISTER
HIGH VOLTAGE
GENERATOR
VCC LEVEL
DETECT
DATA
REGISTER
START
STOP
ACK
CONTROL LOGIC
8bit
IC3513
SII9030CTU-7
41
48
49
29
1
30
61
24
CI2CA
IOVCC
47
IOGND
46
CGND
45
CVCC18
D23
50
D22
51
D21
52
D20
53
D19
54
D18
55
D17
56
D16
57
D15
58
D14
59
CVCC18
60
CGND
TX0–
HSYNC
2
VSYNC
3
CGND
4
CVCC18
5
SPDIF
6
MCLK
7
SD3
8
SD2
9
SD1
10
SD0
11
WS
12
SCK
13
IOVCC
14
IOGND
15
CGND
16
CVCC18
17
INT
18
HPD
19
DSDA
20
DSCL
TX0+
D13
62
D12
63
D11
64
D10
65
D9
66
IDCK
67
D8
68
D7
69
D6
70
D5
71
IOVCC
72
IOGND
73
CGND
74
CVCC18
75
D4
76
D3
77
D2
78
D1
79
D0
80
DE
EXT_SWING
25
AGND
34
AVCC
37
AGND
38
PVCC2
39
PGND2
40
NC
31
AGND
28
AVCC
23
PVCC1
22
PGND1
21
RSVDL
42
RESET#
43
CSCL
44
CSDA
32
33
TX1–
TX1+
35
36
TX2–
TX2+
26
27
TXC–
TXC+
I2C
SLAVE
E-DDC
MASTER
RECEIVER SENS
+ INTERRUPT LOGIC
VIDEO DATA CAPTURE / DE GEN / 656 LOGIC BLOCK
AUDIO DATA
CAPTURE
LOGIC
BLOCK
REGISTERS
CONFIGURATION
LOGIC BLOCK
PANEL LINK
TMDS
DIGITAL CORE
XOR
CSC
4: 2: 2
TO
4: 4: 4
HDCP
KEYS
EEPROM
HDCP
ENCRYPTION
ENGINE