ASRock H170 Combo User Manual - Page 54

CAS Write Latency tCWL, Third Timing, tREFI, tRDRD_sg, tRDRD_dg, tRDRD_dr, tRDRD_dd, tRDWR_sg,

Page 54 highlights

H170 Combo CAS Write Latency (tCWL) Conigure CAS Write Latency. Third Timing tREFI Conigure refresh cycles at an average periodic interval. tCKE Conigure the period of time the DDR4 initiates a minimum of one refresh command internally once it enters Self-Refresh mode. tRDRD_sg Conigure between module read to read delay. tRDRD_dg Conigure between module read to read delay. tRDRD_dr Conigure between module read to read delay. tRDRD_dd Conigure between module read to read delay. tRDWR_sg Conigure between module read to write delay. tRDWR_dg Conigure between module read to write delay. tRDWR_dr Conigure between module read to write delay. tRDWR_dd Conigure between module read to write delay. tWRRD_sg Conigure between module write to read delay. tWRRD_dg Conigure between module write to read delay. 49 English

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49
English
H170 Combo
CAS Write Latency (tCWL)
Con±gure CAS Write Latency.
Third Timing
tREFI
Con±gure refresh cycles at an average periodic interval.
tCKE
Con±gure the period of time the DDR4 initiates a minimum of one refresh
command internally once it enters Self-Refresh mode.
tRDRD_sg
Con±gure between module read to read delay.
tRDRD_dg
Con±gure between module read to read delay.
tRDRD_dr
Con±gure between module read to read delay.
tRDRD_dd
Con±gure between module read to read delay.
tRDWR_sg
Con±gure between module read to write delay.
tRDWR_dg
Con±gure between module read to write delay.
tRDWR_dr
Con±gure between module read to write delay.
tRDWR_dd
Con±gure between module read to write delay.
tWRRD_sg
Con±gure between module write to read delay.
tWRRD_dg
Con±gure between module write to read delay.