ASRock X299M Extreme4 User Manual - Page 75

Odt Park A2

Get ASRock X299M Extreme4 PDF manuals and user guides View all ASRock X299M Extreme4 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 75 highlights

X299M Extreme4 IOL (D1) Configure the IO latency for channel D1. IOL (D2) Configure the IO latency for channel D2. Advanced Setting ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (A2) Configure the memory on die termination resistors' WR for channel A2. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. ODT WR (B2) Configure the memory on die termination resistors' WR for channel B2. ODT WR (C1) Configure the memory on die termination resistors' WR for channel C1. ODT WR (C2) Configure the memory on die termination resistors' WR for channel C2. ODT WR (D1) Configure the memory on die termination resistors' WR for channel D1. ODT WR (D2) Configure the memory on die termination resistors' WR for channel D2. ODT PARK (A1) Configure the memory on die termination resistors' PARK for channel A1. ODT PARK (A2) Configure the memory on die termination resistors' PARK for channel A2. ODT PARK (B1) Configure the memory on die termination resistors' PARK for channel B1. ODT PARK (B2) Configure the memory on die termination resistors' PARK for channel B2. 69 English

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
English
69
X299M Extreme4
IOL (D1)
Configure the IO latency for channel D1.
IOL (D2)
Configure the IO latency for channel D2.
Advanced Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (A2)
Configure the memory on die termination resistors' WR for channel A2.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT WR (B2)
Configure the memory on die termination resistors' WR for channel B2.
ODT WR (C1)
Configure the memory on die termination resistors' WR for channel C1.
ODT WR (C2)
Configure the memory on die termination resistors' WR for channel C2.
ODT WR (D1)
Configure the memory on die termination resistors' WR for channel D1.
ODT WR (D2)
Configure the memory on die termination resistors' WR for channel D2.
ODT PARK (A1)
Configure the memory on die termination resistors' PARK for channel A1.
ODT PARK (A2)
Configure the memory on die termination resistors' PARK for channel A2.
ODT PARK (B1)
Configure the memory on die termination resistors' PARK for channel B1.
ODT PARK (B2)
Configure the memory on die termination resistors' PARK for channel B2.