Acer AOD270 Acer Aspire One D270 Service Guide - Page 138

Pei_memory_init_for_crisis, Pei_recovery_media_not_fou

Page 138 highlights

Table 4-3. (Continued)SEC Phase POST Code Table Functionality Name (Include\ PostCode.h) Phase PostCode SEC_GO_TO_SECSTARTUP SEC 09 SEC_GO_TO_PEICORE SEC 0A * 3rd party relate functions - Platform dependence. Description Setup BIOS ROM cache Enter Boot Firmware Volume Table 4-4. PEI Phase POST Code Table Functionality Name (Include\ PostCode.h) Phase PEI_SIO_INIT PEI PEI_CPU_REG_INIT PEI PEI_CPU_AP_INIT* PEI PEI_CPU_HT_RESET* PEI PEI_PCIE_MMIO_INIT PEI PEI_NB_REG_INIT PEI PEI_SB_REG_INIT PEI PEI_PCIE_TRAINING* PEI PEI_TPM_INIT PEI PEI_SMBUS_INIT PEI PEI_PROGRAM_CLOCK_GEN PEI PEI_IGD_EARLY_INITIAL * PEI PEI_HECI_INIT* PEI PEI_WATCHDOG_INIT* PEI PEI_MEMORY_INIT PEI PEI_MEMORY_INIT_FOR_CRISIS PEI PEI_MEMORY_INSTALL PEI PEI_TXTPEI* PEI PEI_SWITCH_STACK PEI PEI_MEMORY_CALLBACK PEI PEI_ENTER_RECOVERY_MODE PEI PEI_RECOVERY_MEDIA_FOUND PEI PEI_RECOVERY_MEDIA_NOT_FOU PEI ND Post Code 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 Description Super I/O Initialization CPU Early Initialization Multi-processor Early Initial HyperTransport Initialization PCIE MMIO BAR Initialization North Bridge Early Initialization South Bridge Early Initialization PCIE Training TPM Initialization SMBUS Early Initialization Clock Generator Initialization Internal Graphic device early Initialization HECI Initialization Watchdog timer Initialization Memory Initial for Normal boot. Memory Initial for Crisis Recovery Simple Memory test TXT function early Initialization Start to use Memory Set cache for physical memory Recovery device Initialization Found Recovery image Recovery image not found 4-18 Troubleshooting

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