Acer Aspire 9300 Aspire 9300 / Aspire 7000 Service Guide - Page 93

Phoenix BIOS Beep Codes, Beeps, POST Routine Description

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Phoenix BIOS Beep Codes Code 02h 03h 04h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Eh 0Fh 10h 11h 12h 13h 14h 16h 17h 18h 1Ah 1Ch 20h 22h 24h 28h 29h 2Ah 2Ch 2Eh 2Fh 32h 33h 36h 38h 83 Beeps 1-2-2-3 1-3-1-1 1-3-1-3 1-3-4-1 1-3-4-3 POST Routine Description Verify Real Mode Disable Non-Maskable Interrupt (NMI) Get CPU type Initialize system hardware Disable shadow and execute code from the ROM. Initialize chipset with initial POST values Set IN POST flag Initialize CPU registers Enable CPU cache Initialize caches to initial POST values Initialize I/O component Initialize the local bus IDE Initialize Power Management Load alternate registers with initial POST values Restore CPU control word during warm boot Initialize PCI Bus Mastering devices Initialize keyboard controller BIOS ROM checksum Initialize cache before memory autosize 8254 timer initialization 8237 DMA controller initialization Reset Programmable Interrupt Controller Test DRAM refresh Test 8742 Keyboard Controller Set ES segment register to 4 GB Autosize DRAM Initialize POST Memory Manager Clear 215 KB base RAM RAM failure on address line xxxx RAM failure on data bits xxxx of low byte of memory bus Enable cache before system BIOS shadow Test CPU bus-clock frequency Initialize Phoenix Dispatch Manager Warm start shut down Shadow system BIOS ROM Chapter 4

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