Acer Power ST Aspire T300 Service Guide - Page 58

Checkpoint 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 20h 21h 22h 23h 24h 25h 26h 27h 28h Description Auto detect flash type to load appropriate flash R/W codes into the run time area in F000 for ESCD & DMI support. Reserved Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real-time clock power status, and then check for override. Reserved Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers. Reserved Initial onboard clock generator if Early_Init_Onboard_Generator is defined. See also POST 26h. Reserved Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686). Reserved Reserved Initial interrupts vector table. If no special specified, all H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR. Reserved Initial EARLY_PM_INIT switch Reserved Load keyboard matrix (notebook platform) Reserved HPM Initialization (notebook platform) Reserved 1. Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute. 2. Load CMOS settings into BIOS stack. If Smos check- sum fails, use default value instead. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD's legacy information. Early PCI Initialization: • Enumerate PCI bus number • Assign memory & I/O resource • Search for a valid VGA device & VGA BIOS, and put it into C000:0 1. If Early_Init_Onboard_Generator is not defined Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots. 2. Init onboard PWM 3. Init onboard H/W monitor devices Initialize INT 09 buffer Reserved 52 Chapter 4