Asus P4SDR-VM Motherboard DIY Troubleshooting Guide - Page 70

Onboard VGA Shared Memory Size [32M]

Page 70 highlights

SDRAM RAS Precharge Time (value depends on SDRAM SPD) This item controls the idle clocks after issuing a precharge command to the SDRAM. Configuration options: [2T] [3T] SDRAM RAS Active Time (value depends on SDRAM SPD) This item controls the number of SDRAM clocks used for SDRAM parameters. Configuration options: [5T] [6T] [7T] [8T] SDRAM Command Lead-off Time [Auto] Configuration options: [Auto] [2T] [1T] Graphics Aperture Size [64MB] This field allows you to select the size of mapped memory for AGP graphic data. Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] [128MB] [256MB] Onboard VGA Shared Memory Size [32M] This field allows you to select the size of onboard memory for swapping graphical data. Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card does not support this feature, otherwise the system may not boot. Configuration options: [UC] [USWC] PCI 2.1 Support [Enabled] This field enables or disables support for PCI 2.1 features including passive release and delayed transaction. Configuration options: [Disabled] [Enabled] Onboard PCI IDE [Both] This field allows you to enable either the primary IDE channel or secondary IDE channel, or both. You can also set both channels to [Disabled]. Configuration options: [Both] [Primary] [Secondary] [Disabled] 4-18 Chapter 4: BIOS Setup

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104

4-18
Chapter 4: BIOS Setup
SDRAM RAS Precharge Time
(value depends on SDRAM SPD)
This item controls the idle clocks after issuing a precharge command to
the SDRAM. Configuration options: [2T] [3T]
SDRAM RAS Active Time
(value depends on SDRAM SPD)
This item controls the number of SDRAM clocks used for SDRAM
parameters. Configuration options: [5T] [6T] [7T] [8T]
SDRAM Command Lead-off Time [Auto]
Configuration options: [Auto] [2T] [1T]
Graphics Aperture Size [64MB]
This field allows you to select the size of mapped memory for AGP graphic
data. Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] [128MB]
[256MB]
Onboard VGA Shared Memory Size [32M]
This field allows you to select the size of onboard memory for swapping
graphical data. Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache
technology for the video memory of the processor. It can greatly improve
the display speed by caching the display data. You must set this to UC
(uncacheable) if your display card does not support this feature, otherwise
the system may not boot. Configuration options: [UC] [USWC]
PCI 2.1 Support [Enabled]
This field enables or disables support for PCI 2.1 features including
passive release and delayed transaction. Configuration options: [Disabled]
[Enabled]
Onboard PCI IDE [Both]
This field allows you to enable either the primary IDE channel or
secondary IDE channel, or both. You can also set both channels to
[Disabled]. Configuration options: [Both] [Primary] [Secondary] [Disabled]