Asus P5V-VM DH ASUS WiFi-AP Solo User''s Manual for English Edition - Page 69
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CPU L1 & L2 Cache [Enabled] Konfigurationsoptionen: [Disabled] [Enabled] 2.4.2 Chipset Advanced Phoenix-Award BIOS CMOS Setup Utility Chipset DRAM Clock/Drive Control Frequency/Voltage control Top Performance Primary Display Adapter VGA Share Memory Size [Disabled] [PCI-E] [64M] Select Menu Item Specific Help DRAM Clock/Drive Control Advanced Phoenix-Award BIOS CMOS Setup Utility DRAM Clock/Drive Control Current DRAM Frequency DRAM Frequency DRAM Timing Selectable x CAS Latency Time x Bank Interleave x Precharge to Active(Trp) x Active to Precharge(Tras) x Active to CMD(Trcd) x REF to ACT/REF(Trfc) x ACT(0) to ACT(1) (TRRD) 200MHz Auto [By SPD] 2.5 Disabled 4T 07T 4T 20T/21T 3T Select Menu Item Specific Help DRAM Frequency [Auto] Konfigurationsoptionen: [Auto] [400 MHz] [533 MHz] DRAM Timing Selectable [By SPD] Konfigurationsoptionen: [Manual] [By SPD] Die folgenden Elemente sind nur vom Benutzer einstellbar, wenn das Element "DRAM Timing Selectable" auf [Manual] gesetzt wurde. CAS Latency Time [2.5] Konfigurationsoptionen: [2] [2.5] [3] Bank Interleave [Disabled] Konfigurationsoptionen: [Disabled] [2 Bank] [4 Bank] [8 Bank] Precharge to Active(Trp) [4T] Konfigurationsoptionen: [2T] [3T] [4T] [5T] ASUS P5VD2-MX/P5V-VM DH 2-21