Asus RAMPAGE III FORMULA Rampage III Formula User's manual - Page 97

CPU Differential Amplitude [Auto]

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Round Trip Latency on CHB 0 [Auto] Konfigurationsoptionen: [Auto] [Advance 15 Clock] - [Advance 1 Clock] Round Trip Latency on CHC 0 [Auto] Konfigurationsoptionen: [Auto] [Advance 15 Clock] - [Advance 1 Clock] 3rd Information: Die Werte beziehen sich aus den Einstellungen für folgende Unterelemente: WRITE to READ Delay(DD) 6 [Auto] Konfigurationsoptionen: [Auto] [1 DRAM Clock] - [8 DRAM Clock] WRITE to READ Delay(DR) 6 [Auto] Konfigurationsoptionen: [Auto] [1 DRAM Clock] - [8 DRAM Clock] WRITE to READ Delay(SR) 14 [Auto] Konfigurationsoptionen: [Auto] [10 DRAM Clock] - [22 DRAM Clock] READ to WRITE Delay(DD) 9 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [14 DRAM Clock] READ to WRITE Delay(DR) 9 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [14 DRAM Clock] READ to WRITE Delay(SR) 9 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [14 DRAM Clock] READ to READ Delay(DD) 7 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [9 DRAM Clock] READ to READ Delay(DR) 6 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [9 DRAM Clock] READ to READ Delay(SR) 4 [Auto] Konfigurationsoptionen: [Auto] [4 DRAM Clock] [6 DRAM Clock] WRITE to WRITE Delay(DD) 7 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [9 DRAM Clock] WRITE to WRITE Delay(DR) 7 [Auto] Konfigurationsoptionen: [Auto] [2 DRAM Clock] - [9 DRAM Clock] WRITE to WRITE Delay(SR) 4 [Auto] Konfigurationsoptionen: [Auto] [4 DRAM Clock] [6 DRAM Clock] 3.3.13 CPU Differential Amplitude [Auto] Unterschiedliche AMP können die BCLK-Übertaktungsfähigkeit verbessern. Konfigurationsoptionen: [Auto] [700mV] [800mV] [900mV] [1000mV] ROG Rampage III Formula 3-13

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ROG Rampage III Formula
3-13
Round Trip Latency on CHB 0 [Auto]
Konfigurationsoptionen: [Auto] [Advance 15 Clock] – [Advance 1 Clock]
Round Trip Latency on CHC 0 [Auto]
Konfigurationsoptionen: [Auto] [Advance 15 Clock] – [Advance 1 Clock]
3rd Information:
Die Werte beziehen sich aus den Einstellungen für folgende Unterelemente:
WRITE to READ Delay(DD) 6 [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] – [8 DRAM Clock]
WRITE to READ Delay(DR) 6 [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] – [8 DRAM Clock]
WRITE to READ Delay(SR) 14 [Auto]
Konfigurationsoptionen: [Auto] [10 DRAM Clock] – [22 DRAM Clock]
READ to WRITE Delay(DD) 9 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [14 DRAM Clock]
READ to WRITE Delay(DR) 9 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [14 DRAM Clock]
READ to WRITE Delay(SR) 9 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [14 DRAM Clock]
READ to READ Delay(DD) 7 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [9 DRAM Clock]
READ to READ Delay(DR) 6 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [9 DRAM Clock]
READ to READ Delay(SR) 4 [Auto]
Konfigurationsoptionen: [Auto] [4 DRAM Clock] [6 DRAM Clock]
WRITE to WRITE Delay(DD) 7 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [9 DRAM Clock]
WRITE to WRITE Delay(DR) 7 [Auto]
Konfigurationsoptionen: [Auto] [2 DRAM Clock] – [9 DRAM Clock]
WRITE to WRITE Delay(SR) 4 [Auto]
Konfigurationsoptionen: [Auto] [4 DRAM Clock] [6 DRAM Clock]
3.3.13
CPU Differential Amplitude [Auto]
Unterschiedliche AMP können die BCLK-Übertaktungsfähigkeit verbessern.
Konfigurationsoptionen: [Auto] [700mV] [800mV] [900mV] [1000mV]