Biostar G41-M7 Manual - Page 31

Con DRAM Timing by SPD, DRAM tCL, DRAM tRAS, DRAM tRP, DRAM tRCD, DRAM tWR

Page 31 highlights

G41-M 7 BIOS Manual FSB Voltage T his item allows you to select FSB Voltage Control. Options: Default (Default) / +0.1V / +0.2V / +0.3V Chipset Voltage T his item allows you to select Chipset Voltage Control. Options: Default (Default) / +0.1V / +0.2V / 0.3V MCH GTL Ref Voltage T his item allows you to select MCH GT L Ref Voltage Control. Options: 0.63*VTT (Default) / 0.61*VTT / 0.60*VT T Memory Voltage T his item allows you to select DDR Voltage Control. Options: 1.950 V (Default) / 2.055 V / 2.153 V / 2.250 V / 2.557 V / 2.649 V / 2.742 V / 2.837 V Configure DRAM Timing by SP D Options: Enabled (Default) / Disabled DRAM tCL Options: 3 (Default) / 3 ~ 7 DRAM tRAS Options: 9 (Default) / 9 ~ 24 DRAM tRP Options: 3 (Default) / 3 ~ 10 DRAM tRCD Options: 3 (Default) / 3 ~ 10 DRAM tWR Options: 3 (Default) / 3 ~ 15 30

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G41-M 7 BIOS Manual
30
FSB Voltage
This item allows you to select FSB Voltage Control.
Options:
Default (Default) / +0.1V / +0.2V / +0.3V
Chipset Voltage
This item allows you to select Chipset Voltage Control.
Options:
Default (Default) / +0.1V / +0.2V / 0.3V
MCH GTL Ref Voltage
This item allows you to select MCH GTL Ref Voltage Control.
Options:
0.63*VTT (Default) / 0.61*VTT / 0.60*VTT
Memory Voltage
This item allows you to select DDR Voltage Control.
Options:
1.950 V (Default) / 2.055 V / 2.153 V / 2.250 V / 2.557 V / 2.649 V /
2.742 V / 2.837 V
Configure DRAM Timing by SPD
Options:
Enabled (Default) / Disabled
DRAM tCL
Options:
3 (Default) / 3 ~ 7
DRAM tRAS
Options:
9 (Default) / 9 ~ 24
DRAM tRP
Options:
3 (Default) / 3 ~ 10
DRAM tRCD
Options:
3 (Default) / 3 ~ 10
DRAM tWR
Options:
3 (Default) / 3 ~ 15