Gigabyte GA-7IXE4 User Manual - Page 41

SDRAM Idle Cycle Limit, SDRAM TRC Bank Cycle Time, SDRAM TRP SRAS Precharge, SDRAM TRAS Timing

Page 41 highlights

7IXE4 Motherboard • SDRAM Idle Cycle Limit This function specify the number of idle cycles to wait before precharging an idle bank.(Idle cycles are defined as cycles where no valid request is asserted to the MCT.) 0 Cycles 8 Cycles 12 Cycles 16 Cycles 24 Cycles 32 Cycles 48 Cycles Disabled Set SDRAM Idle Limit to 0 Cycles. Set SDRAM Idle Limit to 8 Cycles. (Default value) Set SDRAM Idle Limit to 12 Cycles. Set SDRAM Idle Limit to 16 Cycles. Set SDRAM Idle Limit to 24 Cycles. Set SDRAM Idle Limit to 32 Cycles. Set SDRAM Idle Limit to 48 Cycles. Disabled this function. • SDRAM TRC Bank Cycle Time This function specify the minimum time from activate to activate of the same bank. 3 Cycles 4 Cycles 5 Cycles 6 Cycles 7 Cycles 8 Cycles Set SDRAM TRC Timing Value to 3 Cycles. Set SDRAM TRC Timing Value to 4 Cycles. Set SDRAM TRC Timing Value to 5 Cycles. Set SDRAM TRC Timing Value to 6 Cycles. Set SDRAM TRC Timing Value to 7 Cycles. (Default value) Set SDRAM TRC Timing Value to 8 Cycles. • SDRAM TRP SRAS Precharge This function specify the delay from precharge command to activate command. 2 Cycle 3 Cycle Set SDRAM TRP Timing Value to 2 Cycle. (Default value) Set SDRAM TRP Timing Value to 3 Cycle. • SDRAM TRAS Timing This function specify the minimum bank (SRAS[2:0]#) active time. 2 Cycles 3 Cycles 4 Cycles 5 Cycles 6 Cycles 7 Cycles Set SDRAM TRAS Timing Value to 2 Cycles. Set SDRAM TRAS Timing Value to 3 Cycles. Set SDRAM TRAS Timing Value to 4 Cycles. Set SDRAM TRAS Timing Value to 5 Cycles. (Default value) Set SDRAM TRAS Timing Value to 6 Cycles. Set SDRAM TRAS Timing Value to 7 Cycles. 35

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7IXE4 Motherboard
35
SDRAM Idle Cycle Limit
This function specify the number of idle cycles to wait before precharging an idle bank.(Idle
cycles are defined as cycles where no valid request is asserted to the MCT.)
0 Cycles
Set SDRAM Idle Limit to 0 Cycles.
8 Cycles
Set SDRAM Idle Limit to 8 Cycles.
(Default value)
12 Cycles
Set SDRAM Idle Limit to 12 Cycles.
16 Cycles
Set SDRAM Idle Limit to 16 Cycles.
24 Cycles
Set SDRAM Idle Limit to 24 Cycles.
32 Cycles
Set SDRAM Idle Limit to 32 Cycles.
48 Cycles
Set SDRAM Idle Limit to 48 Cycles.
Disabled
Disabled this function.
SDRAM TRC Bank Cycle Time
This function specify the minimum time from activate to activate of the same bank.
3 Cycles
Set SDRAM TRC Timing Value to 3 Cycles.
4 Cycles
Set SDRAM TRC Timing Value to 4 Cycles.
5 Cycles
Set SDRAM TRC Timing Value to 5 Cycles.
6 Cycles
Set SDRAM TRC Timing Value to 6 Cycles.
7 Cycles
Set SDRAM TRC Timing Value to 7 Cycles.
(Default value)
8 Cycles
Set SDRAM TRC Timing Value to 8 Cycles.
SDRAM TRP SRAS Precharge
This function specify the delay from precharge
command to activate command.
2 Cycle
Set SDRAM TRP Timing Value to 2 Cycle.
(Default value)
3 Cycle
Set SDRAM TRP Timing Value to 3 Cycle.
SDRAM TRAS Timing
This function specify the minimum bank (SRAS[2:0]#) active time.
2 Cycles
Set SDRAM TRAS Timing Value to 2 Cycles.
3 Cycles
Set SDRAM TRAS Timing Value to 3 Cycles.
4 Cycles
Set SDRAM TRAS Timing Value to 4 Cycles.
5 Cycles
Set SDRAM TRAS Timing Value to 5 Cycles.
(Default value)
6 Cycles
Set SDRAM TRAS Timing Value to 6 Cycles.
7 Cycles
Set SDRAM TRAS Timing Value to 7 Cycles.