Intel S5500BC User Guide - Page 72
Table 7. POST Progress Code LED Example, Table 8. Diagnostic LED POST Code Decoder
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Table 7. POST Progress Code LED Example Upper Nibble LEDs Lower Nibble LEDs LEDs MSB LED LED LED LED LED #7 #6 #5 #4 #3 LED #2 LED #1 LSB LED #0 8h 4h 2h 1h 8h 4h 2h 1h Status ON Results 1 OFF ON OFF ON ON 0 1 0 1 1 OFF 0 OFF 0 Ah Ch • Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh. Table 8. Diagnostic LED POST Code Decoder Checkpoint MSB 8h LED #7 Host Processor 0x10h X 0x11h X 0x12h X 0x13h X Chipset 0x21h X Diagnostic LED Decoder O = On, X = Off Upper Nibble Lower Nibble LSB 4h 2h 1h 8h 4h 2h 1h #6 #5 #4 #3 #2 #1 #0 X X O X X X X X X O X X O X X O X X X O X X O X X X O O X O X X X X O Description Power-on initialization of the host processor (bootstrap processor) Host processor cache initialization (including AP) Starting application processor initialization SMM initialization Initializing a chipset component 52 Intel® Server Board S5500BC User's Guide
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