MSI KT4VL User Guide - Page 65

DDR DQS Input Delay, SDRAM Burst Length, SDRAM 1T Command, Fast Command, Fast R-2-R Turnaround

Page 65 highlights

BIOS Setup DDR DQS Input Delay This setting allows you to set the delay time of DQS to improve the setup time and hold time of the data, and improve the stability. Setting options: Auto, 18, 08, 0E, 0F. SDRAM Burst Length This setting allows you to set the size of Burst-Length for DRAM. Bursting feature is a technique that DRAM itself predicts the address of the next memory location to be accessed after the first address is accessed. To use the feature, you need to define the burst length, which is the actual length of burst plus the starting address and allows internal address counter to properly generate the next memory location. The bigger the size, the faster the DRAM performance. Settings: 4 QW, 8 QW. SDRAM 1T Command This setting controls the SDRAM command rate. Selecting Enabled allows SDRAM signal controller to run at 1T (T=clock cycles) rate. Selecting Disabled makes SDRAM signal controller run at 2T rate. 1T is faster than 2T. Setting options: Disabled, Enabled. Fast Command This item controls the internal timing of CPU. Selecting Ultra allows CPU to handle data/instructions at the fastest speed. Fast enables CPU to handle at a faster speed, while Normal let CPU handle them at the slowest rate. Fast R-2-R Turnaround Burst read operation can be interrupted by new read of any bank. Random column access is allowed. READ to READ interval is minimum 1 CLK. Selecting Enabled to shorten the turnaround interval to improve the performance. Setting options: Disabled, Enabled. AGP Timing Control Press and the following sub-menu appears. 3-15

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3-15
BIOS Setup
DDR DQS Input Delay
This setting allows you to set the delay time of DQS to improve the setup
time and hold time of the data, and improve the stability. Setting options:
Auto, 18, 08, 0E, 0F.
SDRAM Burst Length
This setting allows you to set the size of Burst-Length for DRAM.
Burst-
ing feature is a technique that DRAM itself predicts the address of the
next memory location to be accessed after the first address is accessed.
To use the feature, you need to define the burst length, which is the ac-
tual length of burst plus the starting address and allows internal address
counter to properly generate the next memory location.
The bigger the
size, the faster the DRAM performance.
Settings:
4 QW
,
8 QW
.
SDRAM 1T Command
This setting controls the SDRAM command rate.
Selecting
Enabled
al-
lows SDRAM signal controller to run at 1T (T=clock cycles) rate.
Se-
lecting
Disabled
makes SDRAM signal controller run at 2T rate.
1T
is
faster than
2T
.
Setting options:
Disabled, Enabled.
Fast Command
This item controls the internal timing of CPU.
Selecting
Ultra
allows
CPU to handle data/instructions at the fastest speed.
Fast
enables CPU
to handle at a faster speed, while
Normal
let CPU handle them at the
slowest rate.
Fast R-2-R Turnaround
Burst read operation can be interrupted by new read of any bank.
Random column access is allowed. READ to READ interval is mini-
mum 1 CLK. Selecting
Enabled
to shorten the turnaround interval to
improve the performance. Setting options:
Disabled, Enabled.
AGP Timing Control
Press <Enter> and the following sub-menu appears.