ASRock A520M-HVS User Manual - Page 53

CLD0 VDDG IOD Voltage Control AMD Overclocking Setup VDDG IOD represents voltage for the data portion of the Infinity Fabric. It is derived from the CPU SoC/Uncore Voltage (VDD_SOC). VDDG can approach but not exceed VDD_SOC. DRAM Information Load XMP Setting Load XMP settings to overclock the memory and perform beyond standard specifications. DRAM Frequency If [Auto] is selected, the motherboard will detect the memory module(s) inserted and assign the appropriate frequency automatically. Setting DRAM Frequency can adjust DRAM Timing. Infinity Fabric Frequency and Dividers AMD Overclocking Setup Set Infinity Fabric frequency (FCLK). Auto: FCLK = MCLK. Manual: FCLK must be less than or equal to MCLK for best performance in most cases. Latency penalties are incurred if FCLK and MCLK are mismatched, but sufficiently high MCLK can negate or overcome this penalty. DRAM Timing Configuration External Voltage Settings and Load-line Calibration +1.8V Voltage Configure the voltage for the +1.8V Voltage. The default value is [Auto]. DRAM Voltage Configure the voltage for the DRAM Voltage. VDDP Configure the voltage for the VDDP. Save User Default Type a profile name and press enter to save your settings as user default. 48 English