ASRock B365 Phantom Gaming 4 User Manual - Page 66

IO-L Offset CH B

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IO-L Offset (CH A) Configure IO latency offset for channel A. IO-L Offset (CH B) Configure IO latency offset for channel B. RFR Delay (CH A) Configure RFR Delay for Channel A. RFR Delay (CH B) Configure RFR Delay for Channel B. ODT Setting ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (A2) Configure the memory on die termination resistors' WR for channel A2. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. ODT WR (B2) Configure the memory on die termination resistors' WR for channel B2. ODT NOM (A1) Use this to change ODT (CH A1) Auto/Manual settings. The default is [Auto]. ODT NOM (A2) Use this to change ODT (CH A2) Auto/Manual settings. The default is [Auto]. ODT NOM (B1) Use this to change ODT (CH B1) Auto/Manual settings. The default is [Auto]. ODT NOM (B2) Use this to change ODT (CH B2) Auto/Manual settings. The default is [Auto]. ODT PARK (A1) Configure the memory on die termination resistors' PARK for channel A1. 60 English

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English
60
IO-L Offset (CH A)
Configure IO latency offset for channel A.
IO-L Offset (CH B)
Configure IO latency offset for channel B.
RFR Delay (CH A)
Configure RFR Delay for Channel A.
RFR Delay (CH B)
Configure RFR Delay for Channel B.
ODT Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (A2)
Configure the memory on die termination resistors' WR for channel A2.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT WR (B2)
Configure the memory on die termination resistors' WR for channel B2.
ODT NOM (A1)
Use this to change ODT (CH A1) Auto/Manual settings. °e default is [Auto].
ODT NOM (A2)
Use this to change ODT (CH A2) Auto/Manual settings. °e default is [Auto].
ODT NOM (B1)
Use this to change ODT (CH B1) Auto/Manual settings. °e default is [Auto].
ODT NOM (B2)
Use this to change ODT (CH B2) Auto/Manual settings. °e default is [Auto].
ODT PARK (A1)
Configure the memory on die termination resistors' PARK for channel A1.