ASRock Fatal1ty H97 Performance User Manual - Page 89
tRDRD, tWRRD, Configure between module write to write delay.
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Fatal1ty H97 Performance Series Configure refresh cycles at an average periodic interval. tCKE Configure the period of time the DDR3 initiates a minimum of one refresh command internally once it enters Self-Refresh mode. tRDRD Configure between module read to read delay. tRDRDDR Configure between module read to read delay from different ranks. tRDRDDD Use this to change DRAM tRWSR Auto/Manual settings. The default is [Auto]. tWRRD Configure between module write to read delay. tWRRDDR Configure between module write to read delay from different ranks. tWRRDDD Use this to change DRAM tRRSR Auto/Manual settings. The default is [Auto]. Configure between module write to read delay from different DIMMs. tWRWR Configure between module write to write delay. tWRWRDR Configure between module write to write delay from different ranks. tWRWRDD Configure between module write to write delay from different DIMMs. tRDWR Configure between module read to write delay. tRDWRDR Configure between module read to write delay from different ranks. tRDWRDD 81 English
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