ASRock Fatal1ty H97 Performance User Manual - Page 90
FIVR Switch Frequency Offset
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Configure between module read to write delay from different DIMMs. RTL (CHA) Configure round trip latency for channel A. RTL (CHB) Configure round trip latency for channel B. IO-L (CHA) Configure IO latency for channel A. IO-L (CHB) Configure IO latency for channel B. ODT WR (CHA) Configure the memory on die termination resistors' WR for channel A. ODT WR (CHB) Configure the memory on die termination resistors' WR for channel B. ODT NOM (CHA) Use this to change ODT (CHA) Auto/Manual settings. The default is [Auto]. ODT NOM (CHB) Use this to change ODT (CHB) Auto/Manual settings. The default is [Auto]. Command Tri State Enable for DRAM power saving. MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. DIMM Exit Mode Select Slow Exit to reduce power consumption, or Fast Exit for better performance. FIVR Configuration FIVR Switch Frequency Signature Select whether to boost or lower the FIVR Switch Frequency. FIVR Switch Frequency Offset 82 English