ASRock H81M-HG4 R4.0 User Manual - Page 47
FIVR Switch Frequency Signature, ODT NOM CHB
View all ASRock H81M-HG4 R4.0 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 47 highlights
tRDWRDD Configure between module read to write delay from different DIMMs. RTL (CHA) Configure round trip latency for channel A. RTL (CHB) Configure round trip latency for channel B. IO-L (CHA) Configure IO latency for channel A. IO-L (CHB) Configure IO latency for channel B. ODT WR (CHA) Configure the memory on die termination resistors' WR for channel A. ODT WR (CHB) Configure the memory on die termination resistors' WR for channel B. ODT NOM (CHA) Use this to change ODT (CHA) Auto/Manual settings. The default is [Auto]. ODT NOM (CHB) Use this to change ODT (CHB) Auto/Manual settings. The default is [Auto]. Command Tri State Enable for DRAM power saving. MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. DIMM Exit Mode Select Slow Exit to reduce power consumption, or Fast Exit for better performance. FIVR Configuration FIVR Switch Frequency Signature Select whether to boost or lower the FIVR Switch Frequency. 42 English