ASRock H97 Anniversary User Manual - Page 72

Trdrddd, Twrrd, Twrrddr, Twrrddd, Twrwr, Twrwrdr, Twrwrdd, Trdwr, Trdwrdr, Trdwrdd, Rtl Cha, Rtl Chb

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H97 Anniversary tRDRDDD Use this to change DRAM tRWSR Auto/Manual settings. he default is [Auto]. tWRRD Conigure between module write to read delay. tWRRDDR Conigure between module write to read delay from diferent ranks. tWRRDDD Use this to change DRAM tRRSR Auto/Manual settings. he default is [Auto]. Conigure between module write to read delay from diferent DIMMs. tWRWR Conigure between module write to write delay. tWRWRDR Conigure between module write to write delay from diferent ranks. tWRWRDD Conigure between module write to write delay from diferent DIMMs. tRDWR Conigure between module read to write delay. tRDWRDR Conigure between module read to write delay from diferent ranks. tRDWRDD Conigure between module read to write delay from diferent DIMMs. RTL (CHA) Conigure round trip latency for channel A. RTL (CHB) Conigure round trip latency for channel B. IO-L (CHA) Conigure IO latency for channel A. 67 English

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H97 Anniversary
67
English
tRDRDDD
Use this to change DRAM tRWSR Auto/Manual settings. He default is [Auto].
tWRRD
Con±gure between module write to read delay.
tWRRDDR
Con±gure between module write to read delay from diµerent ranks.
tWRRDDD
Use this to change DRAM tRRSR Auto/Manual settings. He default is [Auto].
Con±gure between module write to read delay from diµerent DIMMs.
tWRWR
Con±gure between module write to write delay.
tWRWRDR
Con±gure between module write to write delay from diµerent ranks.
tWRWRDD
Con±gure between module write to write delay from diµerent DIMMs.
tRDWR
Con±gure between module read to write delay.
tRDWRDR
Con±gure between module read to write delay from diµerent ranks.
tRDWRDD
Con±gure between module read to write delay from diµerent DIMMs.
RTL (CHA)
Con±gure round trip latency for channel A.
RTL (CHB)
Con±gure round trip latency for channel B.
IO-L (CHA)
Con±gure IO latency for channel A.