ASRock P5B-DE User Manual - Page 35

3.4.1 CPU Configuration BIOS SETUP UTILITY Advanced CPU Configuration Enhanced Halt State Intel (R) Virtualization tech. CPU Thermal Throttling No-Execute Memory Protection Intel (R) SpeedStep (tm) tech. [Disabled] [Enabled] [Enabled] [Disabled] [Auto] This should be enabled in order to enable or disable the "Enhanced Halt State". +F1 F9 F10 ESC Select Screen Select Item Change Option General Help Load Defaults Save and Exit Exit v02.54 (C) Copyright 1985-2005, American Megatrends, Inc. Enhance Halt State All processors support the Halt State (C1). The C1 state is supported through the native processor instructions HLT and MWAIT and requires no hardware support from the chipset. In the C1 power state, the processor maintains the context of the system caches. Intel (R) Virtualization tech. When this option is set to [Enabled], a VMM (Virtual Machine Architecture) can utilize the additional hardware capabilities provided by Vanderpool Technology. This option will be hidden if the installed CPU does not support Intel (R) Virtualization Technology. CPU Thermal Throttling You may select [Enabled] to enable P4 CPU internal thermal control mechanism to keep the CPU from overheated. No-Excute Memory Protection No-Execution (NX) Memory Protection Technology is an enhancement to the IA-32 Intel Architecture. An IA-32 processor with "No Execute (NX) Memory Protection" can prevent data pages from being used by malicious software to execute code. This option will be hidden if the current CPU does not support No-Excute Memory Protection. Hyper Threading Technology To enable this feature, it requires a computer system with an Intel Pentium® 4 processor that supports Hyper-Threading technology and an operating system that includes optimization for this technology, such as Microsoft® Windows® XP or VistaTM. Set to [Enabled] if using Microsoft® Windows® XP, VistaTM, or Linux kernel version 2.4.18 or higher. This option will be hidden if the installed CPU does not support Hyper-Threading technology. 35