ASRock Q270 Pro BTC User Manual - Page 51
CPU Core/Cache Load-Line Calibration
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Q270 Pro BTC+ tRDWR_dr Configure between module read to write delay. tRDWR_dd Configure between module read to write delay. tWRRD_sg Configure between module write to read delay. tWRRD_dg Configure between module write to read delay. tWRRD_dr Configure between module write to read delay. tWRRD_dd Configure between module write to read delay. tWRWR_sg Configure between module write to write delay. tWRWR_dg Configure between module write to write delay. tWRWR_dr Configure between module write to write delay. tWRWR_dd Configure between module write to write delay. Advanced Setting MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. Voltage Configuration CPU Core/Cache Voltage Input voltage for the processor by the external voltage regulator. CPU Core/Cache Load-Line Calibration 45 English