ASRock X299 OC Formula User Manual - Page 79

Pll Trim for Prefix Memory Controller

Page 79 highlights

X299 OC Formula Intel Speed Shift Technology Enable/Disable Intel Speed Shift Technology support. Enabling will expose the CPPC v2 interface to allow for hardware controlled P-states. Intel Turbo Boost Technology 3.0 Intel Turbo Boost Technology 3.0 enables the processor to run above its base operating frequency when the operating system requests the highest performance state. Adjust Pll Adjust the Pll for higher -BCLK ration combination. Pll Trim Adjust the Pll value between +63 ro -63. Pll Trim Prefix Adjust the Pll Trim Prefix. Pll Trim for Memory Controller Adjust the MC-Pll value between +63 ro -63. Pll Trim for Prefix Memory Controller Adjust the MC-Pll Trim Prefix. TJ-Max offset Adjust the TJ-Max offset. DCST LUT0 Configure the DCST LUT0. DCST LUT1 Configure the DCST LUT1. DCST LUT2 Configure the DCST LUT2. DCST LUT3 Configure the DCST LUT3. 73 English

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English
73
X299 OC Formula
Intel Speed Shift Technology
Enable/Disable Intel Speed Shiſt Technology support. Enabling will expose the
CPPC v2 interface to allow for hardware controlled P-states.
Intel Turbo Boost Technology 3.0
Intel Turbo Boost Technology 3.0 enables the processor to run above its base operating
frequency
when the operating system requests the highest performance state.
Adjust Pll
Adjust the Pll for higher -BCLK ration combination.
Pll Trim
Adjust the Pll value between +63 ro -63.
Pll Trim Prefix
Adjust the Pll Trim Prefix.
Pll Trim for Memory Controller
Adjust the MC-Pll value between +63 ro -63.
Pll Trim for Prefix Memory Controller
Adjust the MC-Pll Trim Prefix.
TJ-Max offset
Adjust the TJ-Max offset.
DCST LUT0
Configure the DCST LUT0.
DCST LUT1
Configure the DCST LUT1.
DCST LUT2
Configure the DCST LUT2.
DCST LUT3
Configure the DCST LUT3.