ASRock Z77TM-ITX User Manual - Page 50

CPU Configuration

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3.4.1 CPU Configuration Intel Hyper Threading Technology To enable this feature, a computer system with an Intel processor that supports Hyper-Threading technology and an operating system that includes optimization for this technology such as Microsoft® Windows® XP / VistaTM / 7 / 8 is required. Set to [Enabled] if using Microsoft® Windows® XP / VistaTM / 7 / 8 or Linux kernel version 2.4.18 or higher. This option will be hidden if the installed CPU does not support Hyper-Threading technology. Active Processor Cores Use this to select the number of cores to enable in each processor package. The default value is [All]. Enhanced Halt State (C1E) All processors support the Halt State (C1). C1 state is supported through the native processor instructions HLT and MWAIT and requires no hardware support from the chipset. In C1 power state the processor maintains the context of the system caches. CPU C3 State Support Use this to enable or disable CPU C3 report to OS. CPU C6 State Support Use this to enable or disable CPU C6 report to OS. Package C State Support Configure options that will be programmed into C State package limit register. The default value is [Auto]. 50

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3.4.1
CPU Configuration
Intel Hyper Threading Technology
To enable this feature, a computer system with an Intel processor
that supports Hyper-Threading technology and an operating system
that includes optimization for this technology such as Microsoft
®
Windows
®
XP / Vista
TM
/ 7 / 8 is required. Set to [Enabled] if using
Microsoft
®
Windows
®
XP / Vista
TM
/ 7 / 8 or Linux kernel version 2.4.18
or higher. This option will be hidden if the installed CPU does not
support Hyper-Threading technology.
Active Processor Cores
Use this to select the number of cores to enable in each processor
package. The default value is [All].
Enhanced Halt State (C1E)
All processors support the Halt State (C1). C1 state is supported
through the native processor instructions HLT and MWAIT and re-
quires no hardware support from the chipset. In C1 power state the
processor maintains the context of the system caches.
CPU C3 State Support
Use this to enable or disable CPU C3 report to OS.
CPU C6 State Support
Use this to enable or disable CPU C6 report to OS.
Package C State Support
Configure options that will be programmed into C State package
limit register. The default value is [Auto].