Acer Aspire ZS600 Acer Aspire ZS600 Desktop Service Guide - Page 200

Checkpoints, Viewing BIOS checkpoints, Bootblock Initialization Code Checkpoints

Page 200 highlights

Checkpoints 0 A checkpoint is either a byte or word value output to I/O port 80h. The BIOS outputs checkpoints throughout bootblock and Power-On Self Test (POST) to indicate the task the system is currently executing. Checkpoint sare very useful in aiding software developers or technicians in debugging problems that occur during the pre- boot process. Viewing BIOS checkpoints 0 Viewing all checkpoints generated by the BIOS requires acheckpoint card, also referred to as a POST card or POST diagnostic card. These are ISA or PCI add-in cards that show the value of I/O port 80h on a LED display. Checkpoints may appear on the bottom right corner of the screen during POST. This display method islimited, since it only displays checkpoints that occur after the video card has been activated. Bootblock Initialization Code Checkpoints 0 The Bootblock initialization code sets up the chipset, memory, and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS. NOTE: NOTE: Please note that checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices. Table 4-2. Checkpoint Before D0 D0 D1 D2 D3 D4 4-6 Description If boot block debugger is enabled, CPU cache-as-RAM functionality is enabled at this point. Stack will be enabled from this point. Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other CPU critical initialization. Early chipset initialization is done. Early super I/O initialization is done including RTC and keyboard controller. Serial port is enabled at this point if needed for debugging. NMI is disabled. Perform keyboard controller BAT test. Save power-on CPUID value in scratch CMOS. Go to flat mode with 4GB limit and GA20 enabled. Verify the boot block checksum. System will hang here if checksum is bad. Disable CACHE before memory detection. Execute full memory sizing module. If memory sizing module not executed, start memory refresh and do memory sizing in Boot block code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled. Test base 512KB memory. Adjust policies and cache first 8MB. Set stack. Troubleshooting

We apologize, but we cannot currently deliver this PDF manual by request of the manufacturer.

We apologize for any inconveniece.