Asus P5E3 User Guide - Page 94
IntelR SpeedStep TM Tech. [Enabled]
UPC - 610839172030
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Ratio CMOS Setting: [9] Allows you to set the ratio between the CPU Core Clock and the FSB Frequency. Use and to adjust the value. Configuration options: [ 6] [ 7] [ 8] [ 9] C1E Support [Enabled] Allows you to enable or disable C1E Support. Configuration options: [Disabled] [Enabled] CPU TM function [Enabled] Configuration options: [Disabled] [Enabled] Vanderpool Technology [Enabled] Configuration options: [Disabled] [Enabled] Execute Disable Bit [Enabled] Allows you to enable or disable the No-Execution Page Protection Technology. Setting this item to [Disabled] forces the XD feature flag to always return to zero (0). Configuration options: [Disabled] [Enabled] Max CPUID Value Limit [Disabled] Setting this item to [Enabled] allows legacy operating systems to boot even without support for CPUs with extended CPUID functions. Configuration options: [Disabled] [Enabled] The following item appears only when you set the CPU Ratio Control item to [Auto]. Intel(R) SpeedStep (TM) Tech. [Enabled] Configuration options: [Disabled] [Enabled] 4-24 Chapter 4: BIOS setup