Asus P5LD2-X 1333 User Manual - Page 79

4.4.3 Chipset The menu allows you to change the advanced chipset settings. Select an item then press to display the sub-menu. Advanced Chipset Settings DRAM Frequency Configure DRAM Timing by SPD Hyper Path 3 DRAM Throttling Threshold Boot Graphic Adapter Priority [Auto] [Enabled] [Auto] [Auto] [PCI Express/PCI] PEG Buffer Length Link Latency PEG Root Control Slot Power High Priority Port Select [Auto] [Auto] [Auto] [Auto] [Disabled] Manual DRAM Frequency Setting or Auto by SPD Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit Advanced Chipset Settings DRAM Frequency [Auto] Allows you to set the frequency of DDR memory module. Configuration options: [Auto] [400Mhz] [533Mhz] Configure DRAM Timing by SPD [Enabled] When this item is enabled, the DRAM timing parameters are set according to the DRAM SPD (Serial Presence Detect). When disabled, you can manually set the DRAM timing parameters through the DRAM sub-items. The following sub-items appear when this item is Disabled. Configuration options: [Disabled] [Enabled] DRAM CAS# Latency [5 Clocks] Controls the latency between the SDRAM read command and the time the data actually becomes available. Configuration options: [6 Clock] [5 Clocks] [4 Clocks] [3 Clocks] DRAM RAS# Precharge [4 Clocks] Controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks] [5 Clocks] [6 Clocks] DRAM RAS# to # Delay [4 Clocks] Controls the latency between the DDR active command and the read/write command. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks] [5 Clocks] [6 Clocks] ASUS P5LD2-X/1333 4-21