Asus RS700-E6 ERS4 User Guide - Page 66
North Bridge Chipset Configuration, Split Below 4GB [Disabled], Channel Interleaving [6:1]
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Split Below 4GB [Disabled] Configuration options: [Disabled] [Auto] Channel Interleaving [6:1] Configuration options: [1:1] [2:1] [4:1] [6:1] Rank Interleaving [4:1] Configuration options: [1:1] [2:1] [4:1] North Bridge Chipset Configuration Advanced BIOS SETUP UTILITY NorthBridge Chipset Configuration NB Revision Current CSI Frequency :B2 :6.400GT South Bridge Chipset Configuration Advanced BIOS SETUP UTILITY CPU Bridge Chipset Configuration USB Functions USB Port Configure USB 2.0 Controller HDA Controller SMBUS Controller [12 USB Ports] [8+4 USB Ports] [Enabled] [Enabled] [Enabled] SLP_S4# Min. Assertion Width [1 to 2 seconds] PCIE Ports Configuration PCIE Port 0 PCIE Port 1 PCIE Port 2 PCIE Port 3 PCIE Port 4 PCIE Port 5 PCIE High Priority Port [Auto] [Auto] [Auto] [Auto] [Auto] [Auto] [Disabled] PCIE Port 0 IOxAPIC Enable [Disabled] Options Disabled 2 USB Ports 4 USB Ports 6 USB Ports 8 USB Ports 10 USB Ports 12 USB Ports +F1 F10 ESC Select Screen Select Item Change Option General Help Save and Exit Exit v02.61 (C)Copyright 1985-2008, American Megatrends, Inc. Scroll down for more items. PCIE Port 1 IOxAPIC Enable PCIE Port 2 IOxAPIC Enable PCIE Port 3 IOxAPIC Enable PCIE Port 4 IOxAPIC Enable PCIE Port 5 IOxAPIC Enable [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] +F1 F10 ESC Select Screen Select Item Change Option General Help Save and Exit Exit v02.61 (C)Copyright 1985-2008, American Megatrends, Inc. 5-18 Chapter 5: BIOS setup