Biostar A740GM2 Bios Setup - Page 22

Chipset Menu

Page 22 highlights

A740G M2+ BIOS Manual 5 Chipset Menu This submenu allows you to configure the specific features of the chipset installed on your system. This chipset manage bus speeds and access to system memory resources, such as DRAM. It also coordinates communications with the PCI bus. Main Advanced BIOS SETUP UTILITY PCIPnP Boot Chipset Performance Exit Advanced Chipset Settings > NorthBridge Configuration > SouthBridge Configuration > AMD 690G/740 Configuration > OnBoard Peripherals Configuration Options for NB Select Screen Select Item EnterGo to Sub Screen F1 General Help F10 Save and Exit ESC Exit vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc. NorthBridge Configuration BIOS SETUP UTILITY Chipset NorthBridge Chipset Configuration > Memory Configuration > ECC Configuration > DRAM Timing Configuration Memory CLK CAS Latency(Tcl) RAS/CAS Delay(Trcd) Row Precharge Time(Trp) Min Active RAS(Tras) RAS/RAS Delay(Trrd) Row Cycle (Trc) Select Screen Select Item EnterGo to Sub Screen F1 General Help F10 Save and Exit ESC Exit vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc. 21

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A740G M2+ BIOS Manual
21
5 Chipset Menu
This submenu allows you to configure the specific features of the chipset installed on
your system. This chipset manage bus speeds and access to system memory
resources, such as DRAM. It also coordinates communications with the PCI bus.
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Chipset
Performance
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
Options for NB
Advanced Chipset Settings
> SouthBridge Configuration
> AMD 690G/740 Configuration
> OnBoard Peripherals Configuration
> NorthBridge Configuration
Exit
NorthBridge Configuration
BIOS SETUP UTILITY
Chipset
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
NorthBridge Chipset Configuration
> Memory Configuration
> ECC Configuration
> DRAM Timing Configuration
Memory CLK
CAS Latency(Tcl)
RAS/CAS Delay(Trcd)
Row Precharge Time(Trp)
Min Active RAS(Tras)
RAS/RAS Delay(Trrd)
Row Cycle (Trc)