Biostar GF8200C M2 Bios Setup - Page 29
DRAM Timing Configuration
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GF8100 M2+ TE/GF8200C M2+ BIOSManual DRAM Timing Configuration BIOS SETU P U TILITY Performance DRAM Timing Co nfiguration Memory CLK CAS Latency( Tcl) RAS/CAS Dela y(Trcd) Row Precharg e Time(Trp) Min Active R AS(Tras) RAS/RAS Dela y(Trrd) Row Cycle (T rc) Command Rate (CR) > Memory Confi guration DRAM Timing Mo de CAS Latency( CL) 2T Command TRCD TRP tRTP [Aut o] [Aut o] [Aut o] [Aut o] [Aut o] [Aut o] S elect Screen S elect Item EnterG o to Sub Screen F1 G eneral Help F10 S ave and Exit ESC E xit vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc. Memory Configuration Memory Configu ration Bank Interleav ing Enable Clock t o All DIMMs MemClk Tristat e C3/ATLVID Memory Hole Re mapping Power Down Ena ble Power Down M ode BIOS SETU P U TILITY Performance [Aut o] [Dis abled] [Dis abled] [Ena bled] [Dis abled] [Cha nnel] Enable Bank Memory Interleaving S elect Screen S elect Item +- C hange Option F1 G eneral Help F10 S ave and Exit ESC E xit vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc. Bank Interleaving Bank Interleaving is an advanced chipset technique used to improve memory perform ance. Memory interleaving increases bandwidth by allowing simultaneous access to more than one piece ofmemory. Options: Auto (Default) / Disabled 28